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4 active postings matched department "DRAM Design Lab (DDL)". Showing the first 4 jobs.
Job matches
| Title | Company | Location | Role group | ATS | Work | Salary | Dates |
|---|---|---|---|---|---|---|---|
| Director, Design Verification | Samsung Semiconductor | San Jose, CA, United States | DRAM Design Lab (DDL) | Greenhouse | active On Site Full Time | $219,000–$351,000 / year | Posted 2026-05-13 First seen 2026-05-29 Changed 2026-06-02 |
| Staff Engineer, ASIC Design Verification | Samsung Semiconductor | San Jose, CA, United States | DRAM Design Lab (DDL) | Greenhouse | active On Site Full Time | $163,000–$253,000 / year | Posted 2026-05-18 First seen 2026-05-29 Changed 2026-06-02 |
| Staff Engineer, High-Speed I/O Analog-Mixed Circuit | Samsung Semiconductor | San Jose, CA, United States | DRAM Design Lab (DDL) | Greenhouse | active On Site Full Time | $163,000–$253,000 / year | Posted 2026-01-29 First seen 2026-05-29 Changed 2026-06-03 |
| Principal Engineer, SOC Design | Samsung Semiconductor | San Jose, CA, United States | DRAM Design Lab (DDL) | Greenhouse | active On Site Full Time | $219,000–$351,000 / year | Posted 2026-02-23 First seen 2026-05-29 Changed 2026-06-06 |
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