Power Electronics Engineer

{
  "content_hash": "da544016631495f8890e9eaa7bc8b8df40f81709af7920f598489da39ea550f8",
  "source_hash": "5987036c107789983b64424a5d13f6d1147db707d4be12c12e8266bc1b534266",
  "last_changed_at": "2026-05-29T07:07:40.070Z",
  "active_status": "active"
}

{
  "language": "en",
  "location": {
    "raw": "Saratoga, CA",
    "city": "Saratoga",
    "region": "CA",
    "country": "United States",
    "is_remote": false,
    "confidence": 0.9
  },
  "salary_max": 250000,
  "salary_min": 150000,
  "inferred_at": "2026-06-06T19:12:13.683Z",
  "launch_scope": {
    "reason": "english_us_canada",
    "included": true,
    "language": "en",
    "location": {
      "raw": "Saratoga, CA",
      "city": "Saratoga",
      "region": "CA",
      "country": "United States",
      "is_remote": false,
      "confidence": 0.9
    },
    "countries": [
      "United States"
    ]
  },
  "remote_policy": null,
  "salary_period": "year",
  "workplace_type": "on_site",
  "salary_currency": "USD"
}

{}

{
  "lists": [
    {
      "text": "Key Responsibilities:",
      "content": "<ul style=\"margin-top: 0in; margin-bottom: 3.0pt;\">\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Design DC/DC converter power stages including switching device selection, filter design, driver circuits, and magnetics.</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Develop battery management and charge regulation circuits with appropriate safety, cycle-life, and charging-profile considerations.</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Perform control-loop modeling and compensation for analog and digitally controlled power supplies.</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Design fault-protection circuits including overcurrent break, current clamp, overvoltage clamp, crowbar, and foldback protection.</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Implement current, voltage, and temperature sensing circuits with filtering, threshold triggers, and ADC integration.</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Perform component derating analysis and design for radiation tolerance across all power subsystems.</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Develop load accounting, mode-based power consumption estimates, and concept-of-operations power budgets.</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Design power distribution networks with DC load switches, telemetry, and protection for multiple subsystem loads.</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Collaborate with PCB layout engineers on power supply layout optimization (loop area minimization, noise reduction, switching node management).</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Support FPGA and digital teams with power supply sequencing, support circuitry, and power integrity requirements.</li>\n</ul>"
    },
    {
      "text": "Required Qualifications:",
      "content": "\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Bachelor’s or Master’s degree in Electrical Engineering or related field.</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">5+ years of experience in power electronics design for aerospace, defense, or high-reliability systems.</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Proven experience designing DC/DC converters, LDOs, and power distribution systems.</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Strong understanding of control-loop theory (analog and digital compensation, stability analysis).</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Experience with fault protection design and safe operating area analysis.</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Proficiency with circuit simulation tools (SPICE, LTSpice, or equivalent).</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Knowledge of component derating standards and radiation tolerance considerations for space applications.</li>\n"
    },
    {
      "text": "Preferred Qualifications:",
      "content": "<ul style=\"margin-top: 0in; margin-bottom: 3.0pt;\">\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Experience with satellite or spacecraft power subsystems (PDU, BMS, BCR, solar array interfaces).</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Background in lithium-ion battery performance, safety, and packaging considerations.</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Experience with motor-drive design and inductive-load drivers (solenoids, magnetorquers).</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Familiarity with orbit-geometry analysis for power-balance and eclipse-cycle planning.</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Understanding of solar panel I-V characteristics, harvesting topologies, and degradation modeling.</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Supply-chain awareness including long-lead component identification and pre-buy strategies.</li>\n</ul>"
    },
    {
      "text": "Tools & Technologies: ",
      "content": "<ul style=\"margin-top: 0in; margin-bottom: 3.0pt;\">\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">SPICE-based circuit simulation (LTSpice, PSpice, or equivalent)</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">Altium Designer (schematic capture)</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">HyperLynx PI (power integrity analysis)</li>\n<li style=\"margin: 0in 0in 3pt 0px; font-size: 11pt; font-family: Arial, sans-serif;\">MATLAB or Python for control-loop modeling and power budget analysis</li>\n</ul>"
    }
  ],
  "country": "US",
  "createdAt": 1775170353961,
  "updatedAt": null,
  "categories": {
    "team": "Engineering & Operations",
    "location": "Saratoga, CA",
    "commitment": "Full-Time",
    "department": "E-Space US",
    "allLocations": [
      "Saratoga, CA"
    ]
  },
  "salaryRange": {
    "max": 250000,
    "min": 150000,
    "currency": "USD",
    "interval": "per-year-salary"
  },
  "workplaceType": "onsite"
}