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HomeCompaniesAristanetworksSenior ODM Hardware Design Engineer

Senior ODM Hardware Design Engineer

Aristanetworks · Santa Clara, CA, United States · Active · $160,000–$180,000 / year · SmartRecruiters

Job facts

FieldValue
CompanyAristanetworks
TitleSenior ODM Hardware Design Engineer
Normalized title-
Department / teamHardware Engineering
LocationSanta Clara, CA, United States
Work model-
Employment typeFull Time
Salary$160,000–$180,000 / year
Statusactive
ATS providerSmartRecruiters
Posted / first seen2026-06-05 / 2026-06-06
Changed / last seen2026-06-06 / 2026-06-06

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PageWhat it containsOpen
Company jobsActive postings from Aristanetworks.Open
Company breakdownsRole, location, ATS, and work model facets for this company.Open
ATS provider jobsActive postings observed through SmartRecruiters.Open
Provider filtered searchThe same provider as a filtered job collection.Open
City jobsActive postings in Santa Clara.Open
Department jobsActive postings in Hardware Engineering.Open
Lifecycle eventsOpen, update, close, and reopen events for this posting.Open
Original postingCanonical source or apply URL captured from the ATS.Open

Linked records

CompanyAristanetworks
Source6cf22095-84c9-49f9-b7cb-0c1bc031e7d4
ATS providerSmartRecruiters

Description

Arista Networks is an industry leader in data-driven, client-to-cloud networking for large data center, campus and routing environments. What sets us apart is our relentless pursuit of innovation. We leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge in an increasingly interconnected world. Our solutions are designed to not only meet the current demands of the digital landscape but to also anticipate and adapt to future challenges. At Arista we value the diversity of thought and perspectives that each employee brings to the table. We  believe that fostering an inclusive environment, where individuals from various backgrounds and experiences feel welcome, is essential for driving creativity and innovation. Our commitment to excellence has earned us several prestigious awards, such as Best Engineering Team, Best Company for Diversity, Compensation, and Work-Life Balance. At Arista, we take pride in our track record of success and strive to maintain the highest standards of quality and performance in everything we do. Who You’ll Work With Working closely with cross-functional teams including software, product management, and manufacturing, our engineers innovate on system architectures, high-speed PCB designs, and signal integrity to deliver state-of-the-art products that drive network performance and reliability. What You'll Do Our Hardware Design Engineering team is at the forefront of developing high-speed networking and Ethernet products used in Enterprise campuses, hyperscale datacenters and bleeding edge AI clusters. The team is responsible for the end-to-end design and development of advanced hardware solutions that meet the demands of modern networking environments. Candidates for this position would be responsible for the entire hardware design process: Authoring Functional Specifications of high power and high density Ethernet switches used in AI networks Selecting and Qualifying Components Schematic Capture (both flat and hierarchical) Working closely with eCAD teams on PCB layout and component footprints Working with internal teams to run (or run your own) signal integrity simulations on both power and datapath signals Specifying PCB stackup and fabrication details with various PCB vendors Working closely with local and overseas Contract Manufacturers (CM), from proto through production Lab bring up and debug of prototypes Driving complex system debug between software, hardware, and test teams Training CM for high yield test and manufacturing Guiding groups of engineers and mentoring younger engineers BSEE or MSEE 10+ years of relevant experience in hardware engineering Experience working with ODM and JDM Experience designing Networking Hardware, particularly Ethernet switching Embedded x86/ARM system design is highly desirable Experience working with systems featuring WiFi/Cellular/other RF Experience working with High speed interfaces, such as DDR, PCIe Writing specifications and drawing schematics for high complexity boards Working closely with CAD designers on complicated layout and routing Working closely with Software and test engineers to bring-up and debug systems Familiarity with signal integrity and power integrity concepts and tools, such as: impedance, PDN’s, differential routing, insertion loss, S-parameters, TDR’s, VNA’s Experience with mass production Design for Manufacturability (DFM) FPGA design and system simulation using Verilog Working with Contract Manufacturers Successfully taking products from concept to production The new hire base pay for this role has a salary range of $160,000 to $180,000. Arista offers different pay ranges based on work location, so that we can offer consistent and competitive pay appropriate to the market. The actual base pay offered will be based on a wide range of factors, including skills, qualifications, relevant experience, and work location. The pay range provided reflects base pay only and in addition certain roles may also be eligible for discretionary Arista bonuses and equity. Employees in Sales roles are eligible to participate in Arista’s Sales Incentive Plan, which pays commissions calculated as a percentage of eligible sales. US-based employees are also entitled to benefits including medical, dental, vision, wellbeing, tax savings and income protection. The recruiting team can share more details during the hiring process specific to the role and location. #LI-FI1 Arista Networks is an equal opportunity employer.  Arista makes all hiring and employment-related decisions in a non-discriminatory manner without regard to race, color, religion, sex, sexual orientation, gender identity, national origin or any other factor determined to be unlawful under applicable federal, state, or law law.  All your information will be kept confidential according to EEO guidelines.

Full job record

Job IDfa58655178e8a39c317cdbc4ac3cefc08fe845c8
Org ID68f22fb7-c35f-4162-a0e3-a1d070b48c86
Source ID6cf22095-84c9-49f9-b7cb-0c1bc031e7d4
Board ID6cf22095-84c9-49f9-b7cb-0c1bc031e7d4
Providersmartrecruiters
Provider Job Key744000130553279
TitleSenior ODM Hardware Design Engineer
Normalized Title
Statusactive
Activeyes
Location TextSanta Clara, CA, United States
DepartmentHardware Engineering
Team
Employment Typefull_time
Workplace Type
Remote Policy
CountryUnited States
RegionCA
CitySanta Clara
Salary RawArista Networks is an industry leader in data-driven, client-to-cloud networking for large data center, campus and routing environments. What sets us apart is our relentless pursuit of innovation. We leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge in an increasingly interconnected world. Our solutions are designed to not only meet the current demands of the digital landscape but to also anticipate and adapt to future challenges. At Arista we value the diversity of thought and perspectives that each employee brings to the table. We  believe that fostering an inclusive environment, where individuals from various backgrounds and experiences feel welcome, is essential for driving creativity and innovation. Our commitment to excellence has earned us several prestigious awards, such as Best Engineering Team, Best Company for Diversity, Compensation, and Work-Life Balance. At Arista, we take pride in our track record of success and strive to maintain the highest standards of quality and performance in everything we do. Who You’ll Work With Working closely with cross-functional teams including software, product management, and manufacturing, our engineers innovate on system architectures, high-speed PCB designs, and signal integrity to deliver state-of-the-art products that drive network performance and reliability. What You'll Do Our Hardware Design Engineering team is at the forefront of developing high-speed networking and Ethernet products used in Enterprise campuses, hyperscale datacenters and bleeding edge AI clusters. The team is responsible for the end-to-end design and development of advanced hardware solutions that meet the demands of modern networking environments. Candidates for this position would be responsible for the entire hardware design process: Authoring Functional Specifications of high power and high density Ethernet switches used in AI networks Selecting and Qualifying Components Schematic Capture (both flat and hierarchical) Working closely with eCAD teams on PCB layout and component footprints Working with internal teams to run (or run your own) signal integrity simulations on both power and datapath signals Specifying PCB stackup and fabrication details with various PCB vendors Working closely with local and overseas Contract Manufacturers (CM), from proto through production Lab bring up and debug of prototypes Driving complex system debug between software, hardware, and test teams Training CM for high yield test and manufacturing Guiding groups of engineers and mentoring younger engineers BSEE or MSEE 10+ years of relevant experience in hardware engineering Experience working with ODM and JDM Experience designing Networking Hardware, particularly Ethernet switching Embedded x86/ARM system design is highly desirable Experience working with systems featuring WiFi/Cellular/other RF Experience working with High speed interfaces, such as DDR, PCIe Writing specifications and drawing schematics for high complexity boards Working closely with CAD designers on complicated layout and routing Working closely with Software and test engineers to bring-up and debug systems Familiarity with signal integrity and power integrity concepts and tools, such as: impedance, PDN’s, differential routing, insertion loss, S-parameters, TDR’s, VNA’s Experience with mass production Design for Manufacturability (DFM) FPGA design and system simulation using Verilog Working with Contract Manufacturers Successfully taking products from concept to production The new hire base pay for this role has a salary range of $160,000 to $180,000. Arista offers different pay ranges based on work location, so that we can offer consistent and competitive pay appropriate to the market. The actual base pay offered will be based on a wide range of factors, including skills, qualifications, relevant experience, and work location. The pay range provided reflects base pay only and in addition certain roles may also be eligible for discretionary Arista bonuses and equity. Employees in Sales roles are eligible to participate in Arista’s Sales Incentive Plan, which pays commissions calculated as a percentage of eligible sales. US-based employees are also entitled to benefits including medical, dental, vision, wellbeing, tax savings and income protection. The recruiting team can share more details during the hiring process specific to the role and location. #LI-FI1 Arista Networks is an equal opportunity employer.  Arista makes all hiring and employment-related decisions in a non-discriminatory manner without regard to race, color, religion, sex, sexual orientation, gender identity, national origin or any other factor determined to be unlawful under applicable federal, state, or law law.  All your information will be kept confidential according to EEO guidelines.
Salary Min160,000
Salary Max180,000
Salary CurrencyUSD
Salary Periodyear
Source URLhttps://jobs.smartrecruiters.com/AristaNetworks/744000130553279-senior-odm-hardware-design-engineer
Apply URLhttps://jobs.smartrecruiters.com/AristaNetworks/744000130553279-senior-odm-hardware-design-engineer?oga=true
First Seen At2026-06-06 10:45:13Z
Last Seen At2026-06-06 10:45:13Z
Last Checked At2026-06-06 10:45:13Z
Last Changed At2026-06-06 10:45:13Z
Inactive At
Source Posted At2026-06-05 16:00:00Z
Source Updated At
Raw Payload Uris3://job-postings-prod-raw-590183727216/raw/provider=smartrecruiters/board=aristanetworks/date=2026-06-06/2026-06-06T10-44-56-147Z-80efa74f20576d3e9d3e3da733adb168389cf7a9d3c4093f14cac59297299215.json
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