Home › Companies › Netpreme › Member of Technical Staff, ASIC Architecture
Member of Technical Staff, ASIC Architecture
Netpreme · Santa Clara, CA or Boston, MA · On Site · Active · Ashby
Job facts
| Field | Value |
|---|---|
| Company | Netpreme |
| Title | Member of Technical Staff, ASIC Architecture |
| Normalized title | - |
| Department / team | Hardware Systems / Hardware Systems |
| Location | Santa Clara, CA, United States |
| Work model | On Site |
| Employment type | Full Time |
| Salary | - |
| Status | active |
| ATS provider | Ashby |
| Posted / first seen | — / 2026-05-29 |
| Changed / last seen | 2026-05-29 / 2026-06-19 |
Related slices
| Page | What it contains | Open |
|---|---|---|
| Company jobs | Active postings from Netpreme. | Open |
| Company breakdowns | Role, location, ATS, and work model facets for this company. | Open |
| ATS provider jobs | Active postings observed through Ashby. | Open |
| Provider filtered search | The same provider as a filtered job collection. | Open |
| City jobs | Active postings in Santa Clara. | Open |
| Department jobs | Active postings in Hardware Systems. | Open |
| Work model jobs | Active On Site postings. | Open |
| Lifecycle events | Open, update, close, and reopen events for this posting. | Open |
| Original posting | Canonical source or apply URL captured from the ATS. | Open |
Linked records
| Company | Netpreme |
| Source | 5f05eb40-800d-4d07-8080-8f7c7aa3a4ab |
| ATS provider | Ashby |
Description
About the Role
We are seeking an ASIC Architect to help define the architecture and microarchitecture of our silicon product. This role is onsite at our Santa Clara, CA or Boston, MA office.
Responsibilities
Performance modeling for GPU memory subsystems and memory-semantics interconnects
Architecting data and control planes for high-speed data movement
Designing and simulating I/O-heavy SoC architectures
Own SoC and system architecture specs from inception through high-volume production
Partner with silicon and software teams to ensure implementation aligns with architecture specs
Qualifications
BS/MS or PhD in Electrical Engineering or Computer Science with 5+ years of relevant experience
Strong background in computer architecture with a focus on memory systems and memory-semantics interconnects
Strong understanding of scale-up memory fabric and protocols
Familiarity with GPU memory organization
Experience running detailed performance modeling for computing and/or data movement ASICs
Familiarity with state-of-the-art distributed ML algorithms
Preferred Qualifications
Experience architecting endpoints for memory-semantics interconnects: CXL, NVLink, UALink, RDMA
Experience building AI accelerators
Background in cloud virtualization and hardware security
Knowledge of ARM CHI / UCIe
Compensation & Benefits
Competitive salary commensurate with experience including base salary, performance-based bonus, and early stage equity grant
Comprehensive benefits including health, dental, vision, and life insurance
Well-equipped, sunny offices in Santa Clara, CA and Boston, MA
Relocation assistance and visa sponsorship
Perks include a daily lunch stipend, 401k match, and more
A collaborative, continuous-learning work environment with smart, dedicated colleagues engaged in developing the next generation of architecture for high-performance computing
The Opportunity
Impact: We are tackling a fundamental challenge at the infrastructure layer: unlocking greater AI capability while dramatically improving efficiency. The work we do here compounds across state-of-the-art AI models, systems, and real-world applications.
Timing: Joining now means real ownership of the company and meaningful influence over product direction and execution. You’ll work from first principles, move quickly from insight to execution, and see your contributions directly reflected in what we build.
Culture: You’ll work alongside a group of people who care deeply about rigor, clarity, and impact. We value thoughtful disagreement, fast learning, and intellectual fearlessness. This is a place where strong ideas shine, curiosity is encouraged, and growth is a daily practice.
Full job record
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| Org ID | d22c302f-888f-425e-945c-27f3f8adf56b |
| Source ID | 5f05eb40-800d-4d07-8080-8f7c7aa3a4ab |
| Board ID | 5f05eb40-800d-4d07-8080-8f7c7aa3a4ab |
| Provider | ashby |
| Provider Job Key | c7b69dd7-6b29-4f98-8b6c-d8132f1ea271 |
| Title | Member of Technical Staff, ASIC Architecture |
| Normalized Title | — |
| Status | active |
| Active | yes |
| Location Text | Santa Clara, CA or Boston, MA |
| Department | Hardware Systems |
| Team | Hardware Systems |
| Employment Type | full_time |
| Workplace Type | on_site |
| Remote Policy | — |
| Country | United States |
| Region | CA |
| City | Santa Clara |
| Salary Raw | — |
| Salary Min | — |
| Salary Max | — |
| Salary Currency | — |
| Salary Period | — |
| Source URL | https://jobs.ashbyhq.com/netpreme/c7b69dd7-6b29-4f98-8b6c-d8132f1ea271 |
| Apply URL | https://jobs.ashbyhq.com/netpreme/c7b69dd7-6b29-4f98-8b6c-d8132f1ea271/application |
| First Seen At | 2026-05-29 05:49:16Z |
| Last Seen At | 2026-06-19 09:22:48Z |
| Last Checked At | 2026-06-19 09:22:48Z |
| Last Changed At | 2026-05-29 05:49:16Z |
| Inactive At | — |
| Source Posted At | — |
| Source Updated At | — |
| Raw Payload Uri | s3://job-postings-prod-raw-590183727216/raw/provider=ashby/board=netpreme/date=2026-06-19/2026-06-19T09-22-47-455Z-9d416b7a4945d30247fde11615a5c0b941d795eda34c6bd90ab740779268a008.json |
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