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HomeCompaniesCareers Gdms Icims ComSr Advanced ASIC FPGA Engineer-(Sign-on Bonus Available)

Sr Advanced ASIC FPGA Engineer-(Sign-on Bonus Available)

Careers Gdms Icims Com · Scottsdale, AZ, US · Hybrid · Active · $152,462–$169,138 / year · iCIMS

Job facts

FieldValue
CompanyCareers Gdms Icims Com
TitleSr Advanced ASIC FPGA Engineer-(Sign-on Bonus Available)
Normalized title-
Department / teamEngineering-Hardware
LocationScottsdale, AZ, United States
Work modelHybrid / Hybrid
Employment typeOTHER
Salary$152,462–$169,138 / year
Statusactive
ATS provideriCIMS
Posted / first seen2026-06-08 / 2026-06-09
Changed / last seen2026-06-20 / 2026-06-23

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City jobsActive postings in Scottsdale.Open
Department jobsActive postings in Engineering-Hardware.Open
Work model jobsActive Hybrid postings.Open
Lifecycle eventsOpen, update, close, and reopen events for this posting.Open
Original postingCanonical source or apply URL captured from the ATS.Open

Linked records

CompanyCareers Gdms Icims Com
Source50a48765-ecd2-4cf1-922c-f51ba44a14f5
ATS provideriCIMS

Description

Basic Qualifications Requires a Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering, Technology or Mathematics field. Also requires 8+ years of job-related experience, or a Master's degree plus 6 years of job-related experience. Agile experience preferred. Clearance Requirements: Department of Defense TS/SCI security clearance is preferred at time of hire. Candidates must be able to obtain a TS/SCI clearance within a reasonable amount of time from date of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required. Responsibilities for this Position Duties and Tasks: • Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments • Determines architecture, system simulation and detailed design approach • Defines module interfaces and all aspects of device design and simulation • Evaluates the process flow including but not limited to high level design, synthesis, place and route, timing and power utilization • Creates test and simulation plans that establish functional criteria • Verifies test results and analyzes performance • May also review vendor capabilities, foundry technologies, device libraries and simulation tools • Contributes to the generation and maintenance of work products (i.e. plans, specifications, design documentation, etc.) used for internal consumption and/or deliverable to external customers • Develops and presents requirements, concepts, designs, decisions and results to internal management, other organizations, teammates and customers • May contribute to technical subcontract management that may include SOW development, proposal evaluation, source selection, technical oversight, and subcontractor work product evaluation and acceptance • Reviews vendor capability to support product development • Applies a strong understanding of the organizationally defined processes throughout the lifecycle of the program or project • Participates in the improvement of the ASIC/FPGA organizational processes • Supports the generation of technical engineering products by using the appropriate standards, processes, procedures, and tools throughout the development life cycle • Leads the research and analysis of data, such as customer design proposal, specifications, and manuals to determine feasibility of design or application • Selects components and equipment based on analysis of specifications and reliability • Contributes to the technical approach on small proposals • Provides leadership and/or direction to lower level employees • Leads technical tasks for small teams or projects • Exercises latitude in determining technical objectives of assignments • Guides the successful completion of major programs and projects Knowledge, Skills and Abilities: • Contributes to the development of new theories and methods in ASIC/FPGA engineering • Strong knowledge of other related disciplines • Strong understanding of ASIC/FPGA engineering processes • Strong awareness of business objectives and Engineering’s role in achieving • Strong proficiency in Microsoft Office applications • Strong written and verbal communications skills • Ability to think creatively • Ability to multi-task • Strong skill in communicating issues, impacts, and corrective actions • Strong ability to recognize and clearly report information relevant to sound engineering design • Strong understanding of basic project leadership principles including SPI/CPI, Earned Value, Cost Account Management (CAM), and Statistical Process Controls • Provides resolution to problems to a diverse range of complex problems which require the use of ingenuity and creativity • Frequent contact with managers within and outside of Engineering • Frequent contact with project teams across the company • Frequent contact with external customers and vendors • Identifies opportunities to apply AI for continuous improvement and innovation Workplace Options: This position is fully on-site or hybrid/flex, as mutually agreed.While on-site, you will be a part of the Scottsdale, AZ team. Learn more at https://gdmissionsystems.com/about-us/major-locations/scottsdale Key Words : Verification, ASIC, FPGA, SystemVerilog, Verilog, Assertions (SVA), OVM, UVM, Digital Signal Processing (DSP), functional coverage, constrained random, formal verification, constrained random testing #LI-Hybrid #CJ1 #LI-KM1 Salary Note This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled. Combined Salary Range USD $152,462.00 - USD $169,138.00 /Yr. Company Overview General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team! Equal Opportunity Employer / Individuals with Disabilities / Protected Veterans

Full job record

Job IDf170c121695ceadbda5f1bb3332db745801f8376
Org IDe6402653-8a5c-4195-a6aa-6434d4616247
Source ID50a48765-ecd2-4cf1-922c-f51ba44a14f5
Board ID50a48765-ecd2-4cf1-922c-f51ba44a14f5
Providericims
Provider Job Key73002
TitleSr Advanced ASIC FPGA Engineer-(Sign-on Bonus Available)
Normalized Title
Statusactive
Activeyes
Location TextScottsdale, AZ, US
DepartmentEngineering-Hardware
Team
Employment TypeOTHER
Workplace Typehybrid
Remote Policyhybrid
CountryUnited States
RegionAZ
CityScottsdale
Salary RawBasic Qualifications Requires a Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering, Technology or Mathematics field. Also requires 8+ years of job-related experience, or a Master's degree plus 6 years of job-related experience. Agile experience preferred. Clearance Requirements: Department of Defense TS/SCI security clearance is preferred at time of hire. Candidates must be able to obtain a TS/SCI clearance within a reasonable amount of time from date of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required. Responsibilities for this Position Duties and Tasks: • Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments • Determines architecture, system simulation and detailed design approach • Defines module interfaces and all aspects of device design and simulation • Evaluates the process flow including but not limited to high level design, synthesis, place and route, timing and power utilization • Creates test and simulation plans that establish functional criteria • Verifies test results and analyzes performance • May also review vendor capabilities, foundry technologies, device libraries and simulation tools • Contributes to the generation and maintenance of work products (i.e. plans, specifications, design documentation, etc.) used for internal consumption and/or deliverable to external customers • Develops and presents requirements, concepts, designs, decisions and results to internal management, other organizations, teammates and customers • May contribute to technical subcontract management that may include SOW development, proposal evaluation, source selection, technical oversight, and subcontractor work product evaluation and acceptance • Reviews vendor capability to support product development • Applies a strong understanding of the organizationally defined processes throughout the lifecycle of the program or project • Participates in the improvement of the ASIC/FPGA organizational processes • Supports the generation of technical engineering products by using the appropriate standards, processes, procedures, and tools throughout the development life cycle • Leads the research and analysis of data, such as customer design proposal, specifications, and manuals to determine feasibility of design or application • Selects components and equipment based on analysis of specifications and reliability • Contributes to the technical approach on small proposals • Provides leadership and/or direction to lower level employees • Leads technical tasks for small teams or projects • Exercises latitude in determining technical objectives of assignments • Guides the successful completion of major programs and projects Knowledge, Skills and Abilities: • Contributes to the development of new theories and methods in ASIC/FPGA engineering • Strong knowledge of other related disciplines • Strong understanding of ASIC/FPGA engineering processes • Strong awareness of business objectives and Engineering’s role in achieving • Strong proficiency in Microsoft Office applications • Strong written and verbal communications skills • Ability to think creatively • Ability to multi-task • Strong skill in communicating issues, impacts, and corrective actions • Strong ability to recognize and clearly report information relevant to sound engineering design • Strong understanding of basic project leadership principles including SPI/CPI, Earned Value, Cost Account Management (CAM), and Statistical Process Controls • Provides resolution to problems to a diverse range of complex problems which require the use of ingenuity and creativity • Frequent contact with managers within and outside of Engineering • Frequent contact with project teams across the company • Frequent contact with external customers and vendors • Identifies opportunities to apply AI for continuous improvement and innovation Workplace Options: This position is fully on-site or hybrid/flex, as mutually agreed.While on-site, you will be a part of the Scottsdale, AZ team. Learn more at https://gdmissionsystems.com/about-us/major-locations/scottsdale Key Words : Verification, ASIC, FPGA, SystemVerilog, Verilog, Assertions (SVA), OVM, UVM, Digital Signal Processing (DSP), functional coverage, constrained random, formal verification, constrained random testing #LI-Hybrid #CJ1 #LI-KM1 Salary Note This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled. Combined Salary Range USD $152,462.00 - USD $169,138.00 /Yr. Company Overview General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team! Equal Opportunity Employer / Individuals with Disabilities / Protected Veterans
Salary Min152,462
Salary Max169,138
Salary CurrencyUSD
Salary Periodyear
Source URLhttps://careers-gdms.icims.com/jobs/73002/sr-advanced-asic-fpga-engineer-%28sign-on-bonus-available%29/job
Apply URLhttps://careers-gdms.icims.com/jobs/73002/sr-advanced-asic-fpga-engineer-%28sign-on-bonus-available%29/job
First Seen At2026-06-09 08:22:45Z
Last Seen At2026-06-23 08:24:53Z
Last Checked At2026-06-23 08:24:53Z
Last Changed At2026-06-20 08:26:58Z
Inactive At
Source Posted At2026-06-08 04:00:00Z
Source Updated At2026-06-15 19:19:21Z
Raw Payload Uris3://job-postings-prod-raw-590183727216/raw/provider=icims/board=careers-gdms.icims.com/date=2026-06-23/2026-06-23T08-24-30-589Z-c1c35459634e500bd61e1bd7b0793531ae57907a75589372357ee34112c72851.json
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