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Sr. Engineer, Infrastructure Software

555e77b2 029a 4357 8712 1dd910b41621 19000101 000001 · Dexter, MI, US, Dexter, MI · Active · $111,000 / year · ADP Workforce Now Recruiting

Job facts

FieldValue
Company555e77b2 029a 4357 8712 1dd910b41621 19000101 000001
TitleSr. Engineer, Infrastructure Software
Normalized title-
Department / team-
LocationDexter, MI, United States
Work model-
Employment typeFull Time
Salary$111,000 / year
Statusactive
ATS providerADP Workforce Now Recruiting
Posted / first seen2026-05-15 / 2026-05-31
Changed / last seen2026-06-06 / 2026-06-06

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Linked records

Company555e77b2 029a 4357 8712 1dd910b41621 19000101 000001
Sourcec2707813-bcf1-47e7-bd8f-33621286a357
ATS providerADP Workforce Now Recruiting

Description

About SiTime SiTime is the Precision Timing company. Timing is the heartbeat of all electronics, ensuring performance, resilience and scalability. For decades, quartz devices, non-silicon technology, have kept systems in sync, but they struggle in harsher, more demanding environments. MEMS-based Precision Timing delivers greater accuracy, smaller size and resilience. Today, MEMS timing powers over 400 applications, including high-growth ones in AI datacenters, automated driving, industrial and humanoid robots, wearables and IoT. Our semiconductor MEMS programmable solutions offer a rich feature set that enables customers to differentiate their products with higher performance, smaller size, lower power, and better reliability. With more than 4 billion devices shipped, SiTime is changing the timing industry. For more information, visit: www.sitime.com . Job Summary SiTime is looking for a talented and motivated Senior Software/Firmware Engineer to join our growing infrastructure team in Michigan. You will build and scale next‑generation mixed-signal semiconductor test systems and automation platforms, collaborating closely with hardware, validation, and test engineers across global teams. This role is essential to ensuring the performance, stability, and scalability of production and R&D test infrastructure This position is “startup mode” by design: you’ll be hands-on, move fast, own outcomes end-to-end, and help shape the architecture, coding standards, and development workflows as the team scales Responsibilities Design and develop software/firmware for mixed-signal chip test systems and infrastructure platforms Build a robust Hardware Abstraction Layer (HAL) to standardize control of instruments, fixtures, and embedded controllers across multiple test platforms Architect modular, reusable software components (drivers, services, libraries, APIs) to enable rapid bring-up of new boards, sockets, and test capabilities Collaborate with hardware and test engineers to bring up systems, debug issues, and validate test setups (hands-on lab work expected) Partner with production teams to transfer test systems to OSAT and support ramp/debug in manufacturing environments Optimize and expand existing test automation frameworks for throughput, reliability, maintainability, and observability Define and implement software quality practices: code reviews, automated testing, release tagging, and CI/CD improvements for infrastructure software Document code, workflows, architecture decisions, and best practices for cross-team collaboration and long-term maintainability Operate effectively in a fast-moving environment: prioritize, scope, prototype, iterate, and harden solutions into production-grade systems Qualifications & Requirements 5+ years of hands-on experience in software and/or firmware development with demonstrated ownership of shipped, maintained systems Strong proficiency in Python, C/C++, C# (MATLAB experience is a plus) Proven experience building hardware-interfacing software such as device drivers, control software, embedded services, or instrument automation Experience with MCU and/or FPGA integration and control (bring-up, interfaces, command/control, validation) Familiarity with instrument communication protocols such as SCPI, VISA, serial/UART (and debugging these interfaces in real systems) Strong debugging skills spanning software + hardware boundaries (signal/logic-level thinking, structured root cause, reproducible fixes) Ability to work independently and collaboratively in a fast-paced environment; comfortable with ambiguity and rapid iteration Willingness to participate in overseas business travel (~1 month per year) MS in Computer Engineering, Computer Science, Electrical Engineering, or equivalent practical experience Preferred Qualifications Experience designing and maintaining a HAL and modular architecture that supports multiple hardware variants and product lines Familiar with lab instruments such as oscilloscopes, digital multimeters, spectrum/phase noise analyzers, power supplies, and switching matrices Experience with bench, Automated Test Equipment (ATE), rack-level test infrastructure development (PXI, DAQ, switching/relay systems) Experience in mixed-signal IC validation/testing, characterization Strong software engineering fundamentals: interfaces, versioning, performance profiling, automated unit/integration testing Experience with CI/CD pipelines, packaging/release management, and runtime telemetry/monitoring for test infrastructure reliability Understanding of semiconductor test engineering and production workflow, including transfer-to-manufacturing and sustaining support Desired Characteristics & Attributes High ownership mindset: delivers results, unblocks self and others, and drives issues to closure “Builder” mentality: enjoys hands-on work, prototypes quickly, then hardens solutions into maintainable platforms Strong communication: clear status, crisp technical writing, and effective collaboration across global teams Compensation Range: At SiTime, we believe great work deserves great rewards. We offer a comprehensive and highly competitive compensation package designed to attract top talent. The annual base salary range for this role is $111,000.00 - $152,680.00. The final offer is determined by factors such as location, experience, education, and training. In addition to base salary, this role is eligible for a quarterly bonus tied to the achievement of innovation goals—reflecting our commitment to recognizing meaningful impact. We also offer equity grants, providing a meaningful opportunity to share in the company’s future growth and success. Benefits offered: 401k plan, health and wellness that includes medical, dental, vision, life, parental leave, legal services, and time off plans. SiTime is an Equal Opportunity Employer . We treat each person fairly and we do not tolerate discrimination or harassment against anyone on the basis of any protected characteristics, including race, color, religion, national or ethnic origin, sex, sexual orientation, gender identity or expression, age, disability, pregnancy, political affiliation, protected veteran status, protected genetic information, or marital status or other characteristics protected by law. SiTime participates in the E-Verify program. Learn More about SiTime: Review the Get to Know SiTime section of our career page to explore our culture, values, and what makes us unique. Innovation on Top – Philosophies of Innovation with Rajesh Vashist Fabrication Knowledge – An Interview with Rajesh Vashist SiTime Corporation – YouTube #LI-SITIME

Full job record

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    "requisitionDescription": "<div><div><div><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;text-align:justify;' data-pasted=\"true\"><span style=\"font-family: arial, sans-serif;\"><strong><span style=\"font-size: 18px;\">About SiTime</span></strong></span></p><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;text-align:justify;'><span style=\"font-family: arial, sans-serif; color: black; font-size: 18px;\">SiTime is the Precision Timing company.&nbsp;</span></p><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;text-align:justify;'><span style=\"font-family: arial, sans-serif; font-size: 18px;\"><br></span></p><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;text-align:justify;'><span style=\"font-family: arial, sans-serif; color: black; font-size: 18px;\">Timing is the heartbeat of all electronics, ensuring performance, resilience and scalability. For decades, quartz devices, non-silicon technology, have kept systems in sync, but they struggle in harsher, more demanding environments. MEMS-based Precision Timing delivers greater accuracy, smaller size and resilience. Today, MEMS timing powers over 400 applications, including high-growth ones in AI datacenters, automated driving, industrial and humanoid robots, wearables and IoT.</span></p><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;text-align:justify;'><span style=\"font-family: arial, sans-serif; font-size: 18px;\"><br></span></p><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;text-align:justify;'><span style=\"font-family: arial, sans-serif; color: black; font-size: 18px;\">Our semiconductor MEMS programmable solutions offer a rich feature set that enables customers to differentiate their products with higher performance, smaller size, lower power, and better reliability. With more than 4 billion devices shipped, SiTime is changing the timing industry. For more information, visit:&nbsp;</span><span style=\"font-family: arial, sans-serif; font-size: 18px;\">&nbsp;<a href=\"https://www.globenewswire.com/Tracker?data=KZboO_E5KYNf2nXu9snYUrujcxPVV14r8VUqaw-krQjviK4SVzg-T3gX0Yv8pdrIU2yKG5VITW08WA-AWCTQKQ==\" target=\"_blank\" style=\"font-size: 18px;\">www.sitime.com</a>.</span></p><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;margin-bottom:6.0pt;text-align:justify;'><span style=\"font-family: arial, sans-serif; font-size: 18px;\">&nbsp;</span></p><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;margin-bottom:6.0pt;text-align:justify;'><span style=\"font-family: arial, sans-serif; font-size: 18px;\"><strong>Job Summary</strong></span></p><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;margin-bottom:6.0pt;'><span style=\"font-family: arial, sans-serif; font-size: 18px;\">SiTime is looking for a talented and motivated Senior Software/Firmware Engineer to join our growing infrastructure team in Michigan. You will build and scale next‑generation mixed-signal semiconductor test systems and automation platforms, collaborating closely with hardware, validation, and test engineers across global teams. This role is essential to ensuring the performance, stability, and scalability of production and R&amp;D test infrastructure</span></p><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;margin-bottom:6.0pt;'><span style=\"font-family: arial, sans-serif; font-size: 18px;\">This position is &ldquo;startup mode&rdquo; by design: you&rsquo;ll be hands-on, move fast, own outcomes end-to-end, and help shape the architecture, coding standards, and development workflows as the team scales</span></p><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;margin-bottom:6.0pt;text-align:justify;'><span style=\"font-family: arial, sans-serif; font-size: 18px;\"><strong>Responsibilities</strong></span></p><ul style=\"margin-bottom:0in;margin-top:0in;\" type=\"disc\"><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif; text-align: justify;\">Design and develop software/firmware for mixed-signal chip test systems and infrastructure platforms</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif; text-align: justify;\">Build a robust Hardware Abstraction Layer (HAL) to standardize control of instruments, fixtures, and embedded controllers across multiple test platforms</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif; text-align: justify;\">Architect modular, reusable software components (drivers, services, libraries, APIs) to enable rapid bring-up of new boards, sockets, and test capabilities</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif; text-align: justify;\">Collaborate with hardware and test engineers to bring up systems, debug issues, and validate test setups (hands-on lab work expected)</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif; text-align: justify;\">Partner with production teams to transfer test systems to OSAT and support ramp/debug in manufacturing environments</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif; text-align: justify;\">Optimize and expand existing test automation frameworks for throughput, reliability, maintainability, and observability</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif; text-align: justify;\">Define and implement software quality practices: code reviews, automated testing, release tagging, and CI/CD improvements for infrastructure software</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif; text-align: justify;\">Document code, workflows, architecture decisions, and best practices for cross-team collaboration and long-term maintainability</li><li style=\"margin: 0in 0in 6pt; font-size: 18px; font-family: arial, sans-serif; text-align: justify;\">Operate effectively in a fast-moving environment: prioritize, scope, prototype, iterate, and harden solutions into production-grade systems</li></ul><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;text-align:justify;'><span style=\"font-family: arial, sans-serif; font-size: 18px;\"><strong>Qualifications &amp; Requirements</strong></span></p><ul style=\"margin-bottom:0in;margin-top:0in;\" type=\"disc\"><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif;\">5+ years of hands-on experience in software and/or firmware development with demonstrated ownership of shipped, maintained systems</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif;\">Strong proficiency in Python, C/C++, C# (MATLAB experience is a plus)</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif;\">Proven experience building hardware-interfacing software such as device drivers, control software, embedded services, or instrument automation</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif;\">Experience with MCU and/or FPGA integration and control (bring-up, interfaces, command/control, validation)</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif;\">Familiarity with instrument communication protocols such as SCPI, VISA, serial/UART (and debugging these interfaces in real systems)</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif;\">Strong debugging skills spanning software + hardware boundaries (signal/logic-level thinking, structured root cause, reproducible fixes)</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif;\">Ability to work independently and collaboratively in a fast-paced environment; comfortable with ambiguity and rapid iteration</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif;\">Willingness to participate in overseas business travel (~1 month per year)</li><li style=\"margin: 0in 0in 6pt; font-size: 18px; font-family: arial, sans-serif;\">MS in Computer Engineering, Computer Science, Electrical Engineering, or equivalent practical experience</li></ul><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;text-align:justify;'><span style=\"font-family: arial, sans-serif; font-size: 18px;\"><strong>Preferred Qualifications</strong></span></p><ul style=\"margin-bottom:0in;margin-top:0in;\" type=\"disc\"><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif;\">Experience designing and maintaining a HAL and modular architecture that supports multiple hardware variants and product lines</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif;\">Familiar with lab instruments such as oscilloscopes, digital multimeters, spectrum/phase noise analyzers, power supplies, and switching matrices</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif;\">Experience with bench, Automated Test Equipment (ATE), rack-level test infrastructure development (PXI, DAQ, switching/relay systems)</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif;\">Experience in mixed-signal IC validation/testing, characterization</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif;\">Strong software engineering fundamentals: interfaces, versioning, performance profiling, automated unit/integration testing</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif;\">Experience with CI/CD pipelines, packaging/release management, and runtime telemetry/monitoring for test infrastructure reliability</li><li style=\"margin: 0in 0in 6pt; font-size: 18px; font-family: arial, sans-serif;\">Understanding of semiconductor test engineering and production workflow, including transfer-to-manufacturing and sustaining support</li></ul><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;text-align:justify;'><span style=\"font-family: arial, sans-serif; font-size: 18px;\"><strong>Desired Characteristics &amp; Attributes</strong></span></p><ul style=\"margin-bottom:0in;margin-top:0in;\" type=\"disc\"><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif;\">High ownership mindset: delivers results, unblocks self and others, and drives issues to closure</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif;\">&ldquo;Builder&rdquo; mentality: enjoys hands-on work, prototypes quickly, then hardens solutions into maintainable platforms</li><li style=\"margin: 0in; font-size: 18px; font-family: arial, sans-serif;\">Strong communication: clear status, crisp technical writing, and effective collaboration across global teams</li></ul><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;margin-left:.5in;'><span style=\"font-family: arial, sans-serif; font-size: 18px;\"><br></span></p><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;text-align:justify;'><span style=\"font-family: arial, sans-serif; font-size: 18px;\"><strong>Compensation Range:</strong></span></p><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;text-align:justify;'><span style=\"font-family: arial, sans-serif; font-size: 18px;\">At SiTime, we believe great work deserves great rewards. We offer a comprehensive and highly competitive compensation package designed to attract top talent.&nbsp;</span></p><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;text-align:justify;'><span style=\"font-family: arial, sans-serif; font-size: 18px;\"><br></span></p><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;text-align:justify;'><span style=\"font-family: arial, sans-serif; font-size: 18px;\">The annual base salary range for this role is $111,000.00 - $152,680.00. The final offer is determined by factors such as location, experience, education, and training.</span></p><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;text-align:justify;'><span style=\"font-family: arial, sans-serif; font-size: 18px;\"><br>&nbsp;In addition to base salary, this role is eligible for a quarterly bonus tied to the achievement of innovation goals&mdash;reflecting our commitment to recognizing meaningful impact. We also offer equity grants, providing a meaningful opportunity to share in the company&rsquo;s future growth and success.</span></p><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;text-align:justify;'><span style=\"font-family: arial, sans-serif; font-size: 18px;\">&nbsp;</span></p><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;text-align:justify;'><span style=\"font-family: arial, sans-serif; font-size: 18px;\">Benefits offered: 401k plan, health and wellness that includes medical, dental, vision, life, parental leave, legal services, and time off plans.</span></p><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;text-align:justify;'><span style=\"font-family: arial, sans-serif; font-size: 18px;\"><br></span></p><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;margin-bottom:11.25pt;text-align:justify;'><span style=\"font-family: arial, sans-serif; color: black; background: white; font-size: 18px;\">SiTime is an&nbsp;</span><span style=\"font-family: arial, sans-serif; font-size: 18px;\"><a href=\"http://www.sitime.com/images/EEO-is-the-law.pdf\" target=\"_blank\" style=\"font-size: 18px;\"><span style=\"color: blue; background: white;\">Equal Opportunity Employer</span></a></span><span style=\"font-family: arial, sans-serif; color: black; background: white; font-size: 18px;\">. We treat each person fairly and we do not tolerate discrimination or harassment against anyone on the basis of any protected characteristics, including race, color, religion, national or ethnic origin, sex, sexual orientation, gender identity or expression, age, disability, pregnancy, political affiliation, protected veteran status, protected genetic information, or marital status or other characteristics protected by law.&nbsp;</span><span style=\"font-family: arial, sans-serif; font-size: 18px;\">SiTime participates in the&nbsp;<a href=\"http://www.sitime.com/images/E-Verify-Participation-Poster.pdf\" target=\"_blank\" style=\"font-size: 18px;\"><span style=\"color: blue;\">E-Verify</span></a> program.</span></p><p style='margin:0in;font-size:16px;font-family:\"Times New Roman\",serif;margin-bottom:11.25pt;text-align:justify;'><span style=\"font-family: arial, sans-serif; color: black; font-size: 18px;\">Learn More about SiTime:&nbsp;Review the&nbsp;</span><span style=\"font-family: arial, sans-serif; font-size: 18px;\"><a href=\"https://www.sitime.com/company/careers\" target=\"_blank\" style=\"font-size: 18px;\">Get to Know SiTime</a></span><span style=\"font-family: arial, sans-serif; color: black; font-size: 18px;\">&nbsp;section of our career page to explore our culture, values, and what makes us unique.&nbsp;</span></p><ul style=\"margin-bottom:0in;margin-top:0in;\" type=\"disc\"><li style=\"margin: 0in 0in 11.25pt; font-size: 18px; font-family: arial, sans-serif; color: black; text-align: justify;\"><span style=\"color: windowtext;\"><a href=\"https://www.innovatorsontap.com/podcast/the-philosophy-of-innovation-w-rajesh-vashist\" target=\"_blank\" style=\"font-weight: bold; font-family: arial, sans-serif; font-size: 18px;\">Innovation on Top &ndash; Philosophies of Innovation with Rajesh Vashist</a></span></li><li style=\"margin: 0in 0in 11.25pt; font-size: 18px; font-family: arial, sans-serif; color: black; text-align: justify;\"><span style=\"color: windowtext;\"><a href=\"https://www.fabricatedknowledge.com/p/an-interview-with-rajesh-vashist-3e0#details\" target=\"_blank\" style=\"font-weight: bold; font-family: arial, sans-serif; font-size: 18px;\">Fabrication Knowledge &ndash; An Interview with Rajesh Vashist</a></span></li><li style=\"margin: 0in 0in 11.25pt; font-size: 18px; font-family: arial, sans-serif; color: black; text-align: justify;\"><span style=\"color: windowtext;\"><a href=\"https://www.youtube.com/user/sitimecorp/videos\" target=\"_blank\" style=\"font-weight: bold; font-family: arial, sans-serif; font-size: 18px;\">SiTime Corporation &ndash; YouTube</a></span></li></ul><p><span style=\"color: rgb(255, 255, 255);\">#LI-SITIME</span></p></div></div></div>\n",
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