Advanced ASIC FPGA Engineer

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    "url": "https://careers-gdms.icims.com/jobs/72020/advanced-asic-fpga-engineer/job",
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    "title": "Advanced ASIC FPGA Engineer",
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    "datePosted": "2026-04-15T04:00:00.000Z",
    "description": "<h2>Basic Qualifications </h2>\n<p>Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering, Technology or Mathematics field. Also requires 5+ years of job-related experience, or a Master's degree plus 3 years of job-related experience.</p>\n<p> </p>\n<p> </p>\n<p><strong>CLEARANCE REQUIREMENTS:</strong>: Department of Defense Secret security clearance is obtainable within a reasonable amount of time after hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.</p>\n<h2>Responsibilities for this Position</h2>\n<p>General Dynamics Mission Systems is seeking a Proficient/Experienced ASIC/FPGA Design Engineer to lead digital design efforts using VHDL on an interim FPGA platform, transitioning designs to full ASIC implementation in collaboration with a packaging team. This role sits within a close-knit team of 5-6 engineers with a key focus on mentoring others through the conversion process. This position is on-site with up to 10% travel to customer sites.</p>\n<h2>Duties and Tasks</h2>\n<ul>\n <li>Responsible for definition, design, verification and documentation for ASIC and/or FPGA developments</li>\n <li>Determines architecture, system simulation and detailed design approach with emphasis on VHDL-based digital design</li>\n <li>Defines module interfaces and all aspects of device design and simulation</li>\n <li>Evaluates the process flow including but not limited to high level design, synthesis, place and route, timing and power utilization</li>\n <li>Creates test and simulation plans that establish functional criteria</li>\n <li>Verifies test results and analyzes performance</li>\n <li>Reviews vendor capabilities, foundry technologies, device libraries and simulation tools</li>\n <li>Participates in the improvement of ASIC/FPGA organizational processes</li>\n <li>Supports the generation of technical engineering products by using the appropriate standards, processes, procedures, and tools throughout the ASIC/FPGA development life cycle</li>\n <li>Contributes to the research and analysis of data, such as customer design proposal specifications and manuals to determine feasibility of design or application</li>\n <li>Selects components and equipment based on analysis of specifications and reliability</li>\n <li>Conducts hardware integration and testing using lab equipment including oscilloscopes, logic analyzers, and JTAG debuggers</li>\n <li>Collaborates with ASIC packaging team to execute FPGA-to-ASIC conversion</li>\n <li>Mentors and guides engineers through the FPGA-to-ASIC conversion methodology and best practices</li>\n <li>Contributes to the completion of major programs and projects</li>\n <li>Supports program execution with awareness of project scope, schedule and cost objectives</li>\n <li>Plans and executes project tasks for activities described above</li>\n</ul>\n<h2>Knowledge, Skills and Abilities</h2>\n<ul>\n <li>Fully proficient understanding of ASIC/FPGA engineering concepts, principles, and theories</li>\n <li>Fully proficient in the principles and techniques of ASIC/FPGA design including FPGA-to-ASIC conversion</li>\n <li>Strong proficiency in VHDL for digital design and simulation</li>\n <li>Hands-on experience with Microsemi and/or Xilinx FPGA platforms</li>\n <li>Fully proficient with Vivado, Libero, Mentor, and/or Cadence EDA tools</li>\n <li>Hardware integration experience with lab tools <em>(oscilloscopes, logic analyzers, JTAG debuggers)</em></li>\n <li>Fully proficient knowledge of other related disciplines including PCB/circuit board design</li>\n <li>Ability to mentor others through complex technical processes</li>\n <li>Keeps abreast of technology trends in ASIC/FPGA and semiconductor design</li>\n <li>Grasps and applies new information quickly</li>\n <li>Fully proficient written and verbal communication skills</li>\n <li>Ability to recognize and clearly report information relevant to sound ASIC/FPGA design</li>\n <li>Fully proficient in Microsoft Office applications</li>\n <li>Ability to think creatively and multi-task effectively</li>\n <li>Fully proficient skill in communicating issues, impacts, and corrective actions</li>\n <li>Working knowledge of earned value concepts and Cost Account Management (CAM) as they relate to program execution</li>\n <li>Frequent contact with project leaders, internal work groups, external customers, and vendors</li>\n <li>Identifies opportunities to apply AI for continuous improvement and innovation</li>\n</ul>\n<h2>Required Qualifications</h2>\n<ul>\n <li>Strong proficiency in VHDL for digital design and simulation</li>\n <li>Hands-on experience with Microsemi and/or Xilinx FPGA development</li>\n <li>Proficiency with Vivado, Libero, Mentor, and/or Cadence EDA tools</li>\n <li>Hardware integration experience with lab tools <em>(oscilloscopes, logic analyzers, JTAG debuggers)</em></li>\n <li>Ability to mentor others through technical processes</li>\n <li>Ability to obtain a DoD Security Clearance within 18 months</li>\n <li>Bachelor's degree in Electrical or Computer Engineering, or related Science, Engineering or Mathematics field plus a minimum of 5 years relevant experience; or Master's degree plus a minimum of 3 years relevant experience</li>\n</ul>\n<h2>Preferred Qualifications</h2>\n<ul>\n <li>Active DoD Security Clearance</li>\n <li>ASIC design or tape-out experience</li>\n <li>PCB/circuit board design background</li>\n <li>FPGA-to-ASIC conversion experience</li>\n <li>Experience with project cost and schedule awareness in a program environment</li>\n</ul>\n<h2>Salary Note</h2>This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled.\n<h2>Combined Salary Range</h2>USD $128,854.00 - USD $142,947.00 /Yr.\n<h2>Company Overview</h2>\n<p>General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!</p>\n<p>Equal Opportunity Employer / Individuals with Disabilities / Protected Veterans</p>",
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