FPGA Engineer

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    "description": "<p><span style=\"font-family: arial, helvetica, sans-serif; font-size: 12pt\"><span style=\"color: rgb(34, 34, 34)\">We at Kandou are a team of passionate professionals striving to make a mark in the trajectory of the semiconductor industry. Our list of customers reads like a who’s is who of the technology world. If you love to be part of an adventure of a start-</span><span style=\"color: rgb(34, 34, 34)\">up challenging established tech giants and you are a proactive problem-solver who is motivated by pushing your limits and challenging the status quo, we have an opportunity for you.</span></span></p>\n<p><br></p>\n<p><span style=\"color: rgb(34, 34, 34); font-family: arial, helvetica, sans-serif; font-size: 12pt\">Kandou is actively seeking a resourceful<span> </span><span style=\"font-weight: bold\">FPGA</span><span> </span><span style=\"font-weight: bold\">Engineer.<br></span></span></p>\n<p><br></p>\n<p>Responsibilities</p>\n<ul>\n<li><span style=\"font-size: 10pt\">FPGA concept and design definition</span></li>\n<li><span style=\"font-size: 10pt\">Close interaction with Verification engineers, Digital designers and validation/characterization engineers</span></li>\n<li><span style=\"font-size: 10pt\">Validation and bring-up of devices and FPGAs in the lab</span></li>\n<li><span style=\"font-size: 10pt\">Prototyping of new digital designs in FPGAs</span></li>\n<li><span style=\"font-size: 10pt\">FPGA design and verification of very high-speed digital circuits</span></li>\n<li><span style=\"font-size: 10pt\">Selection of FPGAs and tool set</span></li>\n<li><span style=\"font-size: 10pt\">Support for post-silicon lab bring-up, debug, characterization and productization.</span></li>\n<li><span style=\"font-size: 10pt\">Post processing of validation results in Python</span></li>\n<li><span style=\"font-size: 10pt\">Analysis and understanding of high-speed serial protocols (USB4, PCIe, DP and Physical Coding Layer (PCS) )</span></li>\n<li><span style=\"font-size: 10pt\">Close interaction with verification and physical implementation engineers to verify circuit functionality and compliance with area, timing and power requirements</span></li>\n<li><span style=\"font-size: 10pt\">Support and interact with internal/external customers on requirements, design specifications, performance results</span></li>\n<li><span style=\"font-size: 10pt\">Manage workload and schedules and report to internal management team and external customers</span></li>\n</ul>\n<p><br></p>\n<p><span style=\"font-size: 12pt\">Skills</span></p>\n<ul>\n<li><span style=\"font-size: 10pt\">Strong interest in the design of FPGAs and blocks for multi-Gigabit serial and parallel data-link transceivers</span></li>\n<li><span style=\"font-size: 10pt\">Scripting (Python preferred) and tool setup skills.</span></li>\n<li><span style=\"font-size: 10pt\">Passionate about FPGAs and FPGA design</span></li>\n<li><span style=\"font-size: 10pt\">Knowledge of high-speed and low-power design techniques, and high-speed serial protocols is a plus</span></li>\n<li><span style=\"font-size: 10pt\">Self-motivated, with strong sense of ownership and responsibility.</span></li>\n<li><span style=\"font-size: 10pt\">Good communicator and team player with strong analytical skills</span></li>\n<li><span style=\"font-size: 10pt\">Strong RTL coding skills (SystemVerilog preferred)</span></li>\n<li><span style=\"font-size: 10pt\">Understanding of verification methodologies, in particular UVM, is an advantage.</span></li>\n</ul>\n<p><br></p>\n<p><span style=\"font-size: 12pt\">Experience</span></p>\n<ul>\n<li><span style=\"font-size: 10pt\">5-10 years’ experience in designing for FPGA targets</span></li>\n<li><span style=\"font-size: 10pt\">Strong technical background in FPGA design, validation and verification</span></li>\n<li><span style=\"font-size: 10pt\">Proven experience in design and verification of FPGAs</span></li>\n<li><span style=\"font-size: 10pt\">Experience in industry standard FPGA tools for design, simulation and verification</span></li>\n<li><span style=\"font-size: 10pt\">Experience in digital high-speed blocks. High Speed interface competence and/or PCS experience would be a plus</span></li>\n<li><span style=\"font-size: 10pt\">Experience in prototyping digital designs in FPGAs</span></li>\n<li><span style=\"font-size: 10pt\">Proven experience with lab instruments and bench measurements for design validation</span></li>\n<li><span style=\"font-size: 10pt\">Experience using Python or other scripting language for design validation and data analysis</span></li>\n</ul>",
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