Home › Companies › Quartermaster › Senior Digital Signals Processing and Algorithms Engineer
Senior Digital Signals Processing and Algorithms Engineer
Quartermaster · Arlington, VA · Hybrid · Active · Ashby
Job facts
| Field | Value |
|---|---|
| Company | Quartermaster |
| Title | Senior Digital Signals Processing and Algorithms Engineer |
| Normalized title | - |
| Department / team | Engineering / Engineering |
| Location | Arlington, VA, United States |
| Work model | Hybrid / Hybrid |
| Employment type | Full Time |
| Salary | - |
| Status | active |
| ATS provider | Ashby |
| Posted / first seen | — / 2026-05-29 |
| Changed / last seen | 2026-05-29 / 2026-06-06 |
Related slices
| Page | What it contains | Open |
|---|---|---|
| Company jobs | Active postings from Quartermaster. | Open |
| Company breakdowns | Role, location, ATS, and work model facets for this company. | Open |
| ATS provider jobs | Active postings observed through Ashby. | Open |
| Provider filtered search | The same provider as a filtered job collection. | Open |
| City jobs | Active postings in Arlington. | Open |
| Department jobs | Active postings in Engineering. | Open |
| Work model jobs | Active Hybrid postings. | Open |
| Lifecycle events | Open, update, close, and reopen events for this posting. | Open |
| Original posting | Canonical source or apply URL captured from the ATS. | Open |
Linked records
| Company | Quartermaster |
| Source | e8e92fa7-71d4-43ea-b0c2-06a6acae3d5d |
| ATS provider | Ashby |
Description
About Us: At Quartermaster AI, we believe the ocean should be a safe and sustainably managed resource for all. By leveraging cutting-edge AI and robotics, we unlock capabilities that were only recently impossible. Our distributed open-ocean systems enable every vessel to sense, compute, and communicate, enhancing maritime domain awareness for those who need it most.
Job Description: Quartermaster AI is seeking an experienced RF/DSP Engineer to build the digital signal processing foundation of our radiofrequency sensing platform. This is a ground-floor role: our DSP pipeline is early-stage, and you will build the primary architecture and implementation of the algorithms that turn raw RF into maritime domain awareness and insights.
You will work closely with our RF hardware and embedded systems engineers to implement signal processing algorithms on edge compute hardware, and with ML/AI engineers to deliver conditioned, feature-rich data that feeds downstream detection and classification pipelines.
Key Responsibilities: Design and implement the end-to-end DSP pipeline from raw IQ sample ingestion through spectral analysis, channelization, filtering, and feature extraction.
Implement and validate algorithms multi-sensor RF geolocation algorithms.
Build and maintain signal detection, framing, and classification primitives that serve as inputs to downstream ML pipelines.
Write optimized signal processing code in C/C++ targeting embedded processors and FPGA soft-core environments on edge hardware.
Experience porting DSP workloads to server-class or cloud compute environments.
Profile and optimize algorithms for latency, throughput, and power within tight edge compute budgets.
Define and implement data pipeline interfaces between the edge layer and cloud/server-side processing, including IQ data formatting, metadata schemas, and transport protocols.
Contribute to system-level design reviews, interface control documents, and technical roadmap planning.
Qualifications (Preferred): Bachelor's or Master's degree in Electrical Engineering, Signal Processing, Applied Mathematics, or a closely related field.
5+ years of hands-on DSP algorithm development for RF applications.
Strong proficiency in C/C++ for performance-critical, embedded or near-real-time signal processing.
Demonstrated experience implementing and validating geolocation algorithms.
Deep understanding of spectral analysis, digital filtering, synchronization, and coherent signal processing fundamentals.
Experience with software-defined radio platforms and IQ data processing workflows.
Proficiency in Python for algorithm prototyping, simulation, and test automation.
Active Secret clearance or demonstrated ability to obtain one.
Strongly Preferred Familiarity with FPGA DSP pipelines (HLS, IP cores, or HDL-level signal processing integration).
Experience building DSP algorithms or pipelines for RF signals in the maritime domain.
Full job record
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| Provider | ashby |
| Provider Job Key | a16ee24c-2811-422f-8ee8-db76b9841b9f |
| Title | Senior Digital Signals Processing and Algorithms Engineer |
| Normalized Title | — |
| Status | active |
| Active | yes |
| Location Text | Arlington, VA |
| Department | Engineering |
| Team | Engineering |
| Employment Type | full_time |
| Workplace Type | hybrid |
| Remote Policy | hybrid |
| Country | United States |
| Region | VA |
| City | Arlington |
| Salary Raw | — |
| Salary Min | — |
| Salary Max | — |
| Salary Currency | — |
| Salary Period | — |
| Source URL | https://jobs.ashbyhq.com/quartermaster/a16ee24c-2811-422f-8ee8-db76b9841b9f |
| Apply URL | https://jobs.ashbyhq.com/quartermaster/a16ee24c-2811-422f-8ee8-db76b9841b9f/application |
| First Seen At | 2026-05-29 06:42:56Z |
| Last Seen At | 2026-06-06 09:37:37Z |
| Last Checked At | 2026-06-06 09:37:37Z |
| Last Changed At | 2026-05-29 06:42:56Z |
| Inactive At | — |
| Source Posted At | — |
| Source Updated At | — |
| Raw Payload Uri | s3://job-postings-prod-raw-590183727216/raw/provider=ashby/board=quartermaster/date=2026-06-06/2026-06-06T09-37-25-170Z-2a7de3236a4eee63a1ec79c624903364f0c47402799ed47066519a2ba79d2ab8.json |
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