Staff Product Engineer

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    "ExternalDescriptionStr": "<p><strong>onsemi</strong>&nbsp;is seeking a motivated, customer focused, and self-driven candidate to join Staff Product Engineer position located in Allen, TX.</p>\n<p>This position offers a great opportunity to work on industry leading semiconductor devices, targeted for broad applications in Automotive and Industrial markets.&nbsp;In&nbsp;this role, you’ll be a member of DfT and Technology Development team,&nbsp;driving DfT and BiST technologies and solutions for analog, mixed signal and digital circuits,&nbsp;working on developing test automation, developing test program generation utilities, and creating golden test method libraries for current and new IPs.&nbsp; Knowledge of analog / mixed signal blocks, DFT, test methodology and HW design requirements and care-abouts is a critical skillset needed to be successful in this role.&nbsp; End goal is to design and productize deep analog and mixed signal test solutions that are high in efficiency (DfT, test methods, complex ATE HW), enabling organization benchmarks in cost-of-test goals.&nbsp;</p>",
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    "CorporateDescriptionStr": "<div>\n <b>onsemi&nbsp;</b><span class=\"ui-provider\">(Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.<br></span>\n</div>\n<div>\n <span class=\"ui-provider\"><br></span>\n</div>\n<div>\n <p style=\"margin: 0in\"><b><span style=\"font-weight: normal\">More details about our company benefits can be found here:</span></b></p>\n <p style=\"margin: 0in\"><a href=\"https://www.onsemi.com/careers/career-benefits\" target=\"_blank\" rel=\"nofollow\">https://www.onsemi.com/careers/career-benefits</a></p>\n</div>",
    "ExternalPostedStartDate": "2025-10-20T22:51:54+00:00",
    "ExternalQualificationsStr": "<p><strong>Requirement:</strong></p>\n<ul>\n <li>BSEE with minimum 7+ years of direct experience of Analog / NVM / High Speed IO Digital Test &amp; DFT Design knowledge</li>\n <li>Experience working with ATE platforms.</li>\n <li>Good programming skills using C/C++, Perl, Python</li>\n <li>Excellent communication and leadership skills, working with cross-functional teams across multiple different internal development and factory sites.&nbsp;</li>\n <li>Extensive knowledge and hands-on experience with DFT methodologies, including scan, MBIST, JTAG, analog BIST, ATPG, functional test, and test compression.&nbsp;</li>\n <li>Strong statistical data analysis skills including correlation and application to test optimization</li>\n <li>Good knowledge of JTAG/iJTAG/P1500 networks and BSDL, ICL and PDL.&nbsp;</li>\n <li>Experience in implementation of MBIST for memories and knowledge of repair schemes, algorithms</li>\n <li>Excellent interpersonal skills – energetic, motivated, and self-driven</li>\n <li>Demonstrate ability to work well within a global team environment.&nbsp;</li>\n <li>Outstanding written and verbal communication skills</li>\n <li>Strong organizational skills and demonstrate ability to manage multiple tasks.</li>\n</ul>",
    "InternalQualificationsStr": "<p><strong>Requirement:</strong></p>\n<ul>\n <li>BSEE with minimum 7+ years of direct experience of Analog / NVM / High Speed IO Digital Test &amp; DFT Design knowledge</li>\n <li>Experience working with ATE platforms.</li>\n <li>Good programming skills using C/C++, Perl, Python</li>\n <li>Excellent communication and leadership skills, working with cross-functional teams across multiple different internal development and factory sites.&nbsp;</li>\n <li>Extensive knowledge and hands-on experience with DFT methodologies, including scan, MBIST, JTAG, analog BIST, ATPG, functional test, and test compression.&nbsp;</li>\n <li>Strong statistical data analysis skills including correlation and application to test optimization</li>\n <li>Good knowledge of JTAG/iJTAG/P1500 networks and BSDL, ICL and PDL.&nbsp;</li>\n <li>Experience in implementation of MBIST for memories and knowledge of repair schemes, algorithms</li>\n <li>Excellent interpersonal skills – energetic, motivated, and self-driven</li>\n <li>Demonstrate ability to work well within a global team environment.&nbsp;</li>\n <li>Outstanding written and verbal communication skills</li>\n <li>Strong organizational skills and demonstrate ability to manage multiple tasks.</li>\n</ul>",
    "OrganizationDescriptionStr": "<span>We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.</span><span></span>\n<div>\n <br/>\n</div>\n<div>\n <br/>\n</div>\n<div>\n <b>onsemi</b>&nbsp;is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, ethnicity, color, religion, ancestry, national origin, age, marital status, pregnancy, sex, sexual orientation, physical or mental disability, medical condition, genetic information, military or veteran status, gender identity, gender expression, or any other protected category under applicable federal, state, or local laws.\n</div>\n<div>\n <br/>\n</div>\n<div>\n If you are an individual with a disability and require a reasonable accommodation to complete any part of the application process, or are limited in the ability or unable to access or use this online application process and need an alternative method for applying, you may contact&nbsp;<span><a href=\"mailto:[email protected]\" target=\"_blank\">[email protected]</a></span> for assistance.\n</div>",
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    "ExternalResponsibilitiesStr": "<p>As a member of the “DfT and Technology Development” Product Engineering Team, you will be required to&nbsp;<strong>own, participate, lead, and drive below activities:</strong></p>\n<ul>\n <li>Definition of Design-for-Test (DfT) and Built-In-Self-Test (BIST) techniques for complex analog and digital designs working with design team.</li>\n <li>Define and code test&nbsp;automation, developing test program generation utilities, and creating golden test method libraries for current and new IPs.</li>\n <li>Identify and deploy company’s DFT/DFx standards and practices with a focus on improved quality and cost reduction.&nbsp;</li>\n <li>Develop and implement DFT methodologies and strategies for mixed-signal designs.&nbsp;</li>\n <li>Collaborate with cross-functional teams to ensure proper integration of DFT features into the overall design.&nbsp;</li>\n <li>Candidate is also expected to participate in Product DFT/Design Reviews at Pre-PG to define and outline ATE capabilities, understand Product Spec requirements, outline test plan and requirements, keeping in mind ATE HW limitations and capabilities.</li>\n <li>Define and propose ATE solutions through “out-of-the-box” thinking during the product development.&nbsp;Drive for test solutions with maximal DfT and minimal test complexity (both hardware and software).</li>\n <li>Act as an interface between ATE vendor, BU PE and design team to define DFT requirements, Test methods and checklists.&nbsp;</li>\n <li>You will be a member of a cross-functional team working on complex ATE testers (Advantest, Teradyne) to drive low cost of test solutions for complex / analog IPs, in high volume production testing.&nbsp;</li>\n <li>Having additional knowledge of power Management, high-speed interfaces (PCIe, LVDS, CSI, DSI, QSPI, DDR, HDMI, USB, etc.), RF testing, massive multi-site, and/or I/Ps requiring safety &amp; security is considered a HUGE PLUS.&nbsp; The candidate, in this role, is expected to learn protocols and industry standards for these high-speed interfaces, define test methods for high-volume production testing with high parallelism, and build / code ATE test-plans for characterization and production testing.&nbsp;&nbsp;</li>\n <li>Drive defect-based test methods.&nbsp;</li>\n <li>Architect hierarchical DFT solutions covering multiple clock and power domains.</li>\n</ul>",
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