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HomeCompaniesCareers Jobyaviation Icims ComSenior FPGA/DSP Engineer

Senior FPGA/DSP Engineer

Careers Jobyaviation Icims Com · Santa Cruz, CA, US · Active · $132,800–$199,300 / year · iCIMS

Job facts

FieldValue
CompanyCareers Jobyaviation Icims Com
TitleSenior FPGA/DSP Engineer
Normalized title-
Department / teamSoftware
LocationSanta Cruz, CA, United States
Work model-
Employment typeFull Time
Salary$132,800–$199,300 / year
Statusactive
ATS provideriCIMS
Posted / first seen2024-06-06 / 2026-05-31
Changed / last seen2026-06-06 / 2026-06-06

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City jobsActive postings in Santa Cruz.Open
Department jobsActive postings in Software.Open
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Linked records

CompanyCareers Jobyaviation Icims Com
Source8e5cd43b-3573-4a2e-a00f-07f733c827a1
ATS provideriCIMS

Description

Company Overview Imagine a piloted air taxi that takes off vertically, then quietly carries you and your fellow passengers over the congested city streets below, enabling you to spend more time with the people and places that matter most. At Joby, we've been working to make that dream a reality since 2009 and we're now in the final stages of certifying our aircraft with the FAA. With plans to launch our aircraft in the US and Dubai, we're now scaling manufacturing and preparing for the launch of our commercial service. Overview The successful candidate will play a crucial role in building and optimizing the dependable sensing and computing systems needed to bring the dream of Urban Air Mobility to market. They will contribute to a team that is focused on implementing signal processing and algorithm accelerators in a combination of hardware and software. The successful candidate will excel in a highly collaborative environment to design and modify processing systems that can be rigorously defined, designed, characterized, and verified, ensuring the safe operation of our aircraft. Responsibilities Work with FPGA, hardware, motor control, software, data, safety, and systems engineers to understand current and future DSP and processing needs, constraints, and challenges. Design new and optimize existing fault-tolerant FPGA-based DSP blocks for sensor acquisition, motor control, navigation, and hardware emulation applications. Develop directed testbenches for DSP blocks based on bit-accurate reference models and assist FPGA verification engineers as needed for more formal verification. Work in a rigorous aircraft certification-focused development environment and create the required models and documentation for the definition, validation, and verification of requirements as needed. Required S./M.S./Ph.D. in relevant discipline (Electrical Engineering, Computer Science, Computer Engineering, Mechatronics, Physics, Mathematics, or similar field; or portfolio of designed and utilized FPGA/ASIC projects). 5+ years’ experience in FPGA or ASIC design in VHDL, Verilog, or SystemVerilog. Experience using MATLAB, Simulink, Python, or C for modeling signal processing systems. Experience implementing fixed-point DSP blocks in RTL, such as IIR and FIR filters, PWM generators, delta-sigma modulators, PLLs, DFT/FFT processors, and CORDIC processors. Familiarity with development in a Linux environment. Desired Experience with DO-254 FPGA compliance. Experience with SEU mitigation for aviation or automotive applications. Experience with C/C++ on embedded processing systems. Experience with processor architecture and communications protocols, such as AXI, DMA, I2C, UART, SPI, SENT, and ethernet. Experience with Xilinx FPGAs (Zynq, Artix) and Vivado toolchain experience, including creation of complex timing constraints. Experience with model-based design and associated automated code generation tools. Additional Information Compensation at Joby is a combination of base pay and Restricted Stock Units (RSUs). The target base pay for this position is $132,800 - $199,300. The compensation package will be determined by job-related knowledge, skills, and experience. Joby also offers a comprehensive benefits package, including paid time off, healthcare benefits, a 401(k) plan with a company match, an employee stock purchase plan (ESPP), short-term and long-term disability coverage, life insurance, and more. Joby is an Equal Opportunity Employer

Full job record

Job IDc21bc7f44edb36a61b64469fcbd28902f46e5fb8
Org IDfacea025-a75a-4397-bb0b-e37529b02821
Source ID8e5cd43b-3573-4a2e-a00f-07f733c827a1
Board ID8e5cd43b-3573-4a2e-a00f-07f733c827a1
Providericims
Provider Job Key4871
TitleSenior FPGA/DSP Engineer
Normalized Title
Statusactive
Activeyes
Location TextSanta Cruz, CA, US
DepartmentSoftware
Team
Employment Typefull_time
Workplace Type
Remote Policy
CountryUnited States
RegionCA
CitySanta Cruz
Salary RawCompany Overview Imagine a piloted air taxi that takes off vertically, then quietly carries you and your fellow passengers over the congested city streets below, enabling you to spend more time with the people and places that matter most. At Joby, we've been working to make that dream a reality since 2009 and we're now in the final stages of certifying our aircraft with the FAA. With plans to launch our aircraft in the US and Dubai, we're now scaling manufacturing and preparing for the launch of our commercial service. Overview The successful candidate will play a crucial role in building and optimizing the dependable sensing and computing systems needed to bring the dream of Urban Air Mobility to market. They will contribute to a team that is focused on implementing signal processing and algorithm accelerators in a combination of hardware and software. The successful candidate will excel in a highly collaborative environment to design and modify processing systems that can be rigorously defined, designed, characterized, and verified, ensuring the safe operation of our aircraft. Responsibilities Work with FPGA, hardware, motor control, software, data, safety, and systems engineers to understand current and future DSP and processing needs, constraints, and challenges. Design new and optimize existing fault-tolerant FPGA-based DSP blocks for sensor acquisition, motor control, navigation, and hardware emulation applications. Develop directed testbenches for DSP blocks based on bit-accurate reference models and assist FPGA verification engineers as needed for more formal verification. Work in a rigorous aircraft certification-focused development environment and create the required models and documentation for the definition, validation, and verification of requirements as needed. Required S./M.S./Ph.D. in relevant discipline (Electrical Engineering, Computer Science, Computer Engineering, Mechatronics, Physics, Mathematics, or similar field; or portfolio of designed and utilized FPGA/ASIC projects). 5+ years’ experience in FPGA or ASIC design in VHDL, Verilog, or SystemVerilog. Experience using MATLAB, Simulink, Python, or C for modeling signal processing systems. Experience implementing fixed-point DSP blocks in RTL, such as IIR and FIR filters, PWM generators, delta-sigma modulators, PLLs, DFT/FFT processors, and CORDIC processors. Familiarity with development in a Linux environment. Desired Experience with DO-254 FPGA compliance. Experience with SEU mitigation for aviation or automotive applications. Experience with C/C++ on embedded processing systems. Experience with processor architecture and communications protocols, such as AXI, DMA, I2C, UART, SPI, SENT, and ethernet. Experience with Xilinx FPGAs (Zynq, Artix) and Vivado toolchain experience, including creation of complex timing constraints. Experience with model-based design and associated automated code generation tools. Additional Information Compensation at Joby is a combination of base pay and Restricted Stock Units (RSUs). The target base pay for this position is $132,800 - $199,300. The compensation package will be determined by job-related knowledge, skills, and experience. Joby also offers a comprehensive benefits package, including paid time off, healthcare benefits, a 401(k) plan with a company match, an employee stock purchase plan (ESPP), short-term and long-term disability coverage, life insurance, and more. Joby is an Equal Opportunity Employer
Salary Min132,800
Salary Max199,300
Salary CurrencyUSD
Salary Periodyear
Source URLhttps://careers-jobyaviation.icims.com/jobs/4871/senior-fpga-dsp-engineer/job
Apply URLhttps://careers-jobyaviation.icims.com/jobs/4871/senior-fpga-dsp-engineer/job
First Seen At2026-05-31 18:44:11Z
Last Seen At2026-06-06 08:30:36Z
Last Checked At2026-06-06 08:30:36Z
Last Changed At2026-06-06 08:30:36Z
Inactive At
Source Posted At2024-06-06 08:30:35Z
Source Updated At2026-03-30 17:24:09Z
Raw Payload Uris3://job-postings-prod-raw-590183727216/raw/provider=icims/board=careers-jobyaviation.icims.com/date=2026-06-06/2026-06-06T08-30-29-544Z-2d3fa2815ddf817b0f35c2f7f676a2a595ebe46ce1cfe65573e9518e18310285.json
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Parsed Structured
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