Home › Companies › Eridu › RTL Engineer, Networking ASIC
RTL Engineer, Networking ASIC
Eridu · Saratoga, CA, United States · On Site · Active · $210,000–$275,000 / year · Rippling ATS
Job facts
| Field | Value |
|---|---|
| Company | Eridu |
| Title | RTL Engineer, Networking ASIC |
| Normalized title | - |
| Department / team | ASIC Engineering |
| Location | Saratoga, CA, United States |
| Work model | On Site |
| Employment type | Full Time |
| Salary | $210,000–$275,000 / year |
| Status | active |
| ATS provider | Rippling ATS |
| Posted / first seen | 2025-07-23 / 2026-05-29 |
| Changed / last seen | 2026-06-06 / 2026-06-06 |
Related slices
| Page | What it contains | Open |
|---|---|---|
| Company jobs | Active postings from Eridu. | Open |
| Company breakdowns | Role, location, ATS, and work model facets for this company. | Open |
| ATS provider jobs | Active postings observed through Rippling ATS. | Open |
| Provider filtered search | The same provider as a filtered job collection. | Open |
| City jobs | Active postings in Saratoga. | Open |
| Department jobs | Active postings in ASIC Engineering. | Open |
| Work model jobs | Active On Site postings. | Open |
| Lifecycle events | Open, update, close, and reopen events for this posting. | Open |
| Original posting | Canonical source or apply URL captured from the ATS. | Open |
Linked records
| Company | Eridu |
| Source | 2e3b3faf-1f18-443b-b03c-ab436c316a6b |
| ATS provider | Rippling ATS |
Description
company
About Eridu
Eridu is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate AI data centers to deliver Faster AI . Today’s AI performance is frequently limited by communication bottlenecks. Eridu introduces multiple industry-first innovations across silicon, packaging, software, and systems to deliver an order of magnitude improvement in performance and unlock greater GPU utilization to speed training job completion times and tokens-per-second for more profitable inference. We do this while simultaneously reducing capital and power costs and improving reliability.
The company’s solutions and value proposition have been widely validated by leading hyperscalers.
Eridu has raised over $200M to date including its most recent, oversubscribed Series A round. The company is led by a veteran team of Silicon Valley executives who have delivered multiple billion dollar product lines and led multiple companies to billion dollar exits, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ: INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (the world’s leading micro-LED company). The company is in execution mode and has a world-class engineering team with decades of experience in state-of-the-art silicon, packaging, optics, software, and systems. Eridu is working with best-in-class supply chain partners including silicon, packaging and systems.
Visit our website eridu.ai to learn more.
role
Position Overview We are seeking experienced RTL designers to help define and implement our industry-leading Networking ASIC’s. If you're a highly motivated self-starter eager to solve real-world problems, this is a unique opportunity to shape the future of AI Networking. As part of the Design Group, you will be responsible for defining, specifying, architecting, executing, and productizing cutting-edge Networking chips.
Responsibilities Packet buffering, queuing, and scheduling: Work on micro architecture and design implementation of high-speed networking ASIC’s, focusing on latency optimization and quality of service (QoS) support. Prior experience with on-chip memory subsystem and scheduling / arbitration design. Implementation and Testing: Implement designs on ASIC platforms, ensuring compliance with industry standards and performance benchmarks. Work with verification team to conduct thorough testing and validation to ensure functionality and reliability. Performance Optimization: Analyze and optimize pipelining architectures to improve performance metrics. Protocol Support: Provide support for various networking protocols such as Ethernet and IP protocols, and high speed interconnects such as UCIe. Troubleshooting and Debugging: Investigate and resolve complex issues related to packet queuing, working closely with cross-functional teams, including system architects, hardware engineers, and firmware developers. Qualifications ME/BE with a minimum of 8-15 years of experience. Hands-on knowledge of SystemVerilog and Verilog is mandatory . Solid understanding of ASIC design methodologies, including simulation, verification, synthesis, and timing adjustments. Proven expertise in designing and optimizing scheduling and QoS mechanisms. Experience with Ethernet and IP protocols. Strong analytical and problem-solving abilities, with meticulous attention to detail in troubleshooting and debugging complex networking issues. Excellent verbal and written communication skills, with the ability to collaborate effectively in a team environment and present technical information to diverse audiences. Why Join Us? At Eridu, you’ll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI infrastructure solutions, transforming the performance of AI data centers.
The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.
Notice to Recruiting Agencies
Eridu does not accept unsolicited resumes or candidate profiles from staffing agencies or third-party recruiters. Any candidate submitted to Eridu without prior written authorization from our recruiting team will be considered unsolicited and will become the property of Eridu. Eridu reserves the right to pursue and hire such candidates without any obligation to pay fees. Recruiting agencies are expressly instructed not to contact hiring managers, employees, or executives regarding open positions.
Full job record
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| Org ID | d05d9cdc-fa71-444b-b57a-6140fe525606 |
| Source ID | 2e3b3faf-1f18-443b-b03c-ab436c316a6b |
| Board ID | 2e3b3faf-1f18-443b-b03c-ab436c316a6b |
| Provider | rippling |
| Provider Job Key | 65c7843b-4893-45b7-8e17-70b4147602a5 |
| Title | RTL Engineer, Networking ASIC |
| Normalized Title | — |
| Status | active |
| Active | yes |
| Location Text | Saratoga, CA, United States |
| Department | ASIC Engineering |
| Team | — |
| Employment Type | full_time |
| Workplace Type | on_site |
| Remote Policy | — |
| Country | United States |
| Region | CA |
| City | Saratoga |
| Salary Raw | USD 210000-275000 YEAR |
| Salary Min | 210,000 |
| Salary Max | 275,000 |
| Salary Currency | USD |
| Salary Period | year |
| Source URL | https://ats.rippling.com/eridu-ai/jobs/65c7843b-4893-45b7-8e17-70b4147602a5 |
| Apply URL | https://ats.rippling.com/eridu-ai/jobs/65c7843b-4893-45b7-8e17-70b4147602a5 |
| First Seen At | 2026-05-29 07:14:02Z |
| Last Seen At | 2026-06-06 19:44:35Z |
| Last Checked At | 2026-06-06 19:44:35Z |
| Last Changed At | 2026-06-06 19:44:35Z |
| Inactive At | — |
| Source Posted At | 2025-07-23 20:35:32Z |
| Source Updated At | — |
| Raw Payload Uri | s3://job-postings-prod-raw-590183727216/raw/provider=rippling/board=eridu-ai/date=2026-06-06/2026-06-06T19-44-33-762Z-4b761a1811184974f9facfa7bb3d3a7e8696180848a08b199b5b79a934e7d18e.json |
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"role": "<meta><h2 style=\"font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:15pt;font-weight:600;letter-spacing:0.5px;margin-top:18px;margin-bottom:4px;padding-left:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">Position Overview</strong></b></h2><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"color:black;white-space:pre-wrap;\">We are seeking experienced RTL designers to help define and implement our industry-leading Networking ASIC’s. </span><span style=\"white-space:pre-wrap;\"> </span><span style=\"color:black;white-space:pre-wrap;\">If you're a highly motivated self-starter eager to solve real-world problems, this is a unique opportunity to shape the future of AI Networking. As part of the Design Group, you will be responsible for defining, specifying, architecting, executing, and productizing cutting-edge Networking chips.</span></p><h2 style=\"font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:15pt;font-weight:600;letter-spacing:0.5px;margin-top:18px;margin-bottom:4px;padding-left:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">Responsibilities </strong></b></h2><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"color:black;font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Packet buffering, queuing, and scheduling: Work on micro architecture and design implementation of high-speed networking ASIC’s, focusing on latency optimization and quality of service (QoS) support. Prior experience with on-chip memory subsystem and scheduling / arbitration design.</span></li><li style=\"color:black;font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Implementation and Testing: Implement designs on ASIC platforms, ensuring compliance with industry standards and performance benchmarks. Work with verification team to conduct thorough testing and validation to ensure functionality and reliability.</span></li><li style=\"color:black;font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Performance Optimization: Analyze and optimize pipelining architectures to improve performance metrics.</span></li><li style=\"color:black;font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Protocol Support: Provide support for various networking protocols such as Ethernet and IP protocols, and high speed interconnects such as UCIe.</span></li><li style=\"color:black;font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Troubleshooting and Debugging: Investigate and resolve complex issues related to packet queuing, working closely with cross-functional teams, including system architects, hardware engineers, and firmware developers.</span></li></ul><h2 style=\"font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:15pt;font-weight:600;letter-spacing:0.5px;margin-top:18px;margin-bottom:4px;padding-left:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">Qualifications</strong></b></h2><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"color:black;font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">ME/BE with a minimum of 8-15 years of experience.</span></li><li style=\"color:black;font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Hands-on knowledge of SystemVerilog and Verilog is mandatory</span><b><strong style=\"white-space:pre-wrap;\">.</strong></b></li><li style=\"color:black;font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Solid understanding of ASIC design methodologies, including simulation, verification, synthesis, and timing adjustments.</span></li><li style=\"color:black;font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Proven expertise in designing and optimizing scheduling and QoS mechanisms.</span></li><li style=\"color:black;font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Experience with Ethernet and IP protocols.</span></li><li style=\"color:black;font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Strong analytical and problem-solving abilities, with meticulous attention to detail in troubleshooting and debugging complex networking issues.</span></li><li style=\"color:black;font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Excellent verbal and written communication skills, with the ability to collaborate effectively in a team environment and present technical information to diverse audiences.</span></li></ul><h3 style=\"font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:17.5pt;font-weight:600;letter-spacing:0.25px;margin-top:14px;margin-bottom:4px;padding-left:0px;\"><b><strong style=\"font-size:17.5pt;white-space:pre-wrap;\">Why Join Us?</strong></b></h3><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"color:black;white-space:pre-wrap;\">At Eridu, you’ll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI infrastructure solutions, transforming the performance of AI data centers. </span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"color:black;white-space:pre-wrap;\"> </span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"color:black;white-space:pre-wrap;\">The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles. </span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:12pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><br></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:14pt;white-space:pre-wrap;\">Notice to Recruiting Agencies</strong></b></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"white-space:pre-wrap;\">Eridu does not accept unsolicited resumes or candidate profiles from staffing agencies or third-party recruiters. Any candidate submitted to Eridu without prior written authorization from our recruiting team will be considered unsolicited and will become the property of Eridu. Eridu reserves the right to pursue and hire such candidates without any obligation to pay fees. Recruiting agencies are expressly instructed not to contact hiring managers, employees, or executives regarding open positions.</span></p>",
"company": "<meta><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"color:black;font-size:18pt;white-space:pre-wrap;\">About Eridu </strong></b></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:left;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Eridu is a Silicon Valley-based hardware startup pioneering infrastructure</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">solutions</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">that accelerate AI data centers to deliver</span><span style=\"white-space:pre-wrap;\"> </span><i><em style=\"font-size:11pt;white-space:pre-wrap;\">Faster AI</em></i><span style=\"font-size:11pt;white-space:pre-wrap;\">. Today’s AI performance is</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">frequently</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">limited by communication bottlenecks. Eridu</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">introduces</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">multiple industry-first innovations across silicon, packaging, software, and systems to deliver an order of magnitude improvement in</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">performance and</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">unlock greater GPU</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">utilization</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">to speed training job completion times and tokens-per-second for more profitable inference. We do this while simultaneously reducing capital and power costs</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">and</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">improving reliability. </span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:left;\"><span style=\"font-size:11pt;white-space:pre-wrap;\"> </span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:left;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">The company’s solutions and value proposition have been widely</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">validated</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">by leading hyperscalers. </span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:left;\"><span style=\"font-size:11pt;white-space:pre-wrap;\"> </span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:left;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Eridu</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">has raised</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">over</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">$200M to</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">date</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">including its most recent, oversubscribed Series A round.</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">The company</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">is led by a veteran team of Silicon Valley executives who have delivered multiple</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">billion dollar</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">product lines and led multiple companies to billion dollar exits, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ: INFN),</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">Lightera</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">(acq. by</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">Ciena),</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">Gainspeed (acq. by Nokia) and Mojo Vision (the world’s leading micro-LED company). The company is in execution mode and has a world-class engineering team with decades of experience in</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">state-of-the-art</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">silicon, packaging, optics, software, and systems. Eridu</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">is working with best-in-class supply chain partners</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">including</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">silicon,</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">packaging</span><span style=\"white-space:pre-wrap;\"> </span><span style=\"font-size:11pt;white-space:pre-wrap;\">and systems. </span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"white-space:pre-wrap;\"> </span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"white-space:pre-wrap;\">Visit our website </span><a href=\"https://eridu.ai/\" target=\"_blank\" class=\"css-173makr-linkStyle\" style=\"color:rgb(30,74,169);cursor:pointer;\"><span style=\"white-space:pre-wrap;\">eridu.ai</span></a><span style=\"white-space:pre-wrap;\"> to learn more.</span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11.25pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:left;\"><br></p>"
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