Analog IC Design Engineer

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    "datePosted": "2026-03-05T05:00:00.000Z",
    "description": "<h2>Overview</h2>\n<p>SRI’s Integrated Systems & Solutions (InSyS) Division designs leading-edge R&D technologies that power the systems end users depend on every day. From proof-of-concept to execution in the real world, we provide our customers the keys to achieve their objectives. Our goal: To uncover and deliver on profound possibilities for a smarter, safer, and more sustainable world.</p>\n<p> </p>\n<p>InSyS's Center for Advanced Imaging is searching for an Analog IC Design Engineer to join their team. The candidate will help position SRI for continued growth in silicon CMOS, CCD, III-V and ROIC-based imaging technologies and products deployed in the commercial, government and military markets. The Analog IC Design Engineer will be a key member in the Advanced Imaging Group, will work with senior designers, define architecture, design and model circuit components for optimal performance, explore new cutting-edge design, support collaboration between different teams and interface with customers.</p>\n<p> </p>\n<p>The position will work onsite in our Princeton, NJ office.</p>\n<h2>Responsibilities</h2>\n<ul>\n <li>Defining architecture</li>\n <li>Designing, modeling and laying out circuit components</li>\n <li>Monitoring and summarizing progress of various collaborating teams</li>\n</ul>\n<h2>Qualifications</h2>\n<ul>\n <li>PhD, or MS with 3+ years of experience, or BS with 5+ years of experience in the area of Analog/Mixed-Signal IC design with CMOS technology</li>\n <li>Candidates must be a US Citizen or Permanent Resident</li>\n <li>Solid understanding, design and tape-out experience of analog and mixed-signal CMOS circuits</li>\n <li>Knowledge of analog circuits such as bandgap, OpAmps, comparators, filters, ADC, DAC, PLL, and high-speed IO cells</li>\n <li>Experience with Cadence Virtuoso Schematic Editor, Layout Editor, Spectre/APS SPICE simulators</li>\n <li>Experience in analog IC layout to address DRC, LVS, matching, shielding, electromigration, IR drops, and power/ground bouncing issues</li>\n <li>Familiarity with VerilogA/AMS behavioral modeling is a plus</li>\n <li>Familiarity with switched-C circuit design is a plus</li>\n <li>Familiarity with CMOS image sensor design is a plus</li>\n</ul>\n<p>Intangibles:</p>\n<ul>\n <li>Strong communications skills including handling client interactions and presentations</li>\n <li>Self-starter who can work independently</li>\n <li>Able to work in a team environment including device design, digital design, layout, simulation, test and packaging teams</li>\n</ul>\n<p>The salary range is: $104,139-137,979. Salary ranges will vary and are based on several factors, including geographic location, market competitiveness and equity amongst internal employees in similar roles. Positions may also qualify for SRI's Pay for Outstanding Performance program or the annual Performance Based Compensation program. SRI also has a competitive benefits package, to view details please go to https://www.sri.com/resources/benefits/. SRI will accept applications until the position is filled.</p>\n<p> </p>\n<p>SRI is an independent nonprofit research institute headquartered in Menlo Park, Calif., with a rich history of supporting government and industry. We create and deliver world-changing solutions for a safer, healthier, and more sustainable future. For more than 75 years, we have collaborated across technical and scientific disciplines to discover and develop groundbreaking products and technologies and bring innovations and ideas to the marketplace.</p>",
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