Sr Research Engineer - FPGA Design

{
  "content_hash": "27c6c2b3fd4535559d55bc3fad6d215d4e4df3db9641b575565fd912a0e24979",
  "source_hash": "aaf2880ca94921b773608e04675c7a8e639f1b64657d11290aecac132eb32bd0",
  "last_changed_at": "2026-06-06T19:44:57.978Z",
  "active_status": "deleted"
}

{
  "language": "en",
  "location": {
    "raw": "Boulder, CO, US",
    "city": "Boulder",
    "region": "CO",
    "country": "United States",
    "is_remote": false,
    "confidence": 0.8
  },
  "salary_max": 175054,
  "salary_min": 117684,
  "inferred_at": "2026-06-04T13:52:04.030Z",
  "launch_scope": {
    "reason": "english_us_canada",
    "included": true,
    "language": "en",
    "location": {
      "raw": "Boulder, CO, US",
      "city": "Boulder",
      "region": "CO",
      "country": "United States",
      "is_remote": false,
      "confidence": 0.8
    },
    "countries": [
      "United States"
    ]
  },
  "remote_policy": null,
  "salary_period": "year",
  "workplace_type": null,
  "salary_currency": "USD"
}

{}

{
  "json_ld": {
    "url": "https://careers-sri.icims.com/jobs/6381/sr-research-engineer---fpga-design/job",
    "@type": "JobPosting",
    "title": "Sr Research Engineer - FPGA Design",
    "@context": "http://schema.org",
    "datePosted": "2026-04-28T04:00:00.000Z",
    "description": "<h2>Overview</h2>\n<p>SRI is seeking a <strong>Senior Research Engineer with deep expertise in FPGA design</strong> to lead the development of real-time signal processing systems for advanced sensing applications. This role focuses on low-latency firmware development, high-performance digital signal processing (DSP) implementation, and hands-on system prototyping.</p>\n<p>You will work in multidisciplinary teams to design and deploy real-time hardware systems for applications including radar, communications, quantum sensing, and photonics. This position is ideal for an engineer who thrives at the intersection of algorithms and hardware and enjoys translating complex signal processing concepts into efficient, real-world implementations.</p>\n<p>This role is part of SRI’s Advanced Technology and Systems Division (ATSD), which develops innovative, high-performance technologies across domains including radar and electronic warfare, imaging systems, robotics, quantum sensing, and applied optics.</p>\n<h2>Responsibilities</h2>\n<ul>\n <li>Design and implement FPGA-based architectures for real-time signal processing and low-latency data pipelines</li>\n <li>Translate advanced DSP and algorithmic concepts into efficient hardware implementations</li>\n <li>Collaborate closely with algorithm developers to optimize performance, resource utilization, and throughput</li>\n <li>Lead FPGA development efforts from architecture and design through implementation, integration, and hardware validation</li>\n <li>Develop and integrate embedded systems for real-time data acquisition, processing, and control</li>\n <li>Guide system-level design decisions, including hardware/software partitioning and interface definition</li>\n <li>Mentor junior engineers and provide technical leadership across projects</li>\n <li>Support system integration, testing, and evaluation of prototype and fielded systems</li>\n <li>Contribute to technical proposals, white papers, and customer briefings</li>\n</ul>\n<h2>Qualifications</h2>\n<p><strong>Required Qualifications</strong></p>\n<ul>\n <li>Bachelor’s, Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, Physics, or a related field</li>\n <li>B.S. + 8 years, M.S. + 6 years, or Ph.D. + 3 years of relevant experience</li>\n <li>U.S. Citizenship with the ability to obtain and maintain a U.S. government security clearance</li>\n</ul>\n<p>Technical Expertise</p>\n<ul>\n <li>Extensive hands-on FPGA design experience, including architecture, RTL development, simulation, timing closure, and hardware validation</li>\n <li>Proficiency with HDL languages (Verilog, SystemVerilog, VHDL, or equivalent)</li>\n <li>Strong background in digital system architecture and embedded system design</li>\n <li>Solid foundation in DSP with practical implementation experience</li>\n</ul>\n<p>Applied Experience</p>\n<ul>\n <li>Experience implementing real-time systems with strict latency and throughput requirements (e.g., radar, communications, or similar domains)</li>\n <li>Familiarity with SDR platforms and heterogeneous compute systems (e.g., GPUs) for sensor data processing</li>\n <li>Experience with system integration, test, and evaluation of complex hardware prototypes</li>\n</ul>\n<p>Additional Skills</p>\n<ul>\n <li>Proficiency in Python, C, C++, or MATLAB</li>\n <li>Ability to communicate complex technical concepts clearly to internal teams and external stakeholders</li>\n <li>Experience contributing to proposals, technical documentation, and customer presentations</li>\n <li>Strong problem-solving skills and ability to manage multiple priorities</li>\n <li>Willingness to travel occasionally for fieldwork, testing, or customer engagement</li>\n</ul>\n<p>Preferred Qualifications</p>\n<ul>\n <li>Active Top Secret (TS) clearance (SCI and/or SAP experience strongly preferred)</li>\n <li>Advanced experience with radar and RF communication systems, including waveform design and processing techniques</li>\n <li>Familiarity with radar signal processing methods such as matched filtering, range-Doppler processing, SAR, monopulse, or backprojection imaging</li>\n <li>Experience with embedded software development on microprocessors or SoCs</li>\n <li>Experience applying AI/ML techniques to sensing or signal processing problems</li>\n <li>Strong presentation skills and experience briefing technical and non-technical audiences</li>\n</ul>\n<p><strong>What We Offer</strong></p>\n<ul>\n <li>Opportunity to work on cutting-edge technologies with real-world impact</li>\n <li>Collaborative, mission-driven research environment</li>\n <li>Competitive compensation and comprehensive benefits</li>\n <li>Opportunities for technical leadership, innovation, and career growth</li>\n</ul>\n<p>The salary range is: $117,684-$175,054. Salary ranges will vary and are based on several factors, including geographic location, market competitiveness and equity amongst internal employees in similar roles. Positions may also qualify for SRI's Pay for Outstanding Performance program or the annual Performance Based Compensation program. SRI also has a competitive benefits package, to view details please go to https://www.sri.com/resources/benefits/. SRI will accept applications until the position is filled.</p>\n<p>SRI is an independent nonprofit research institute headquartered in Menlo Park, Calif., with a rich history of supporting government and industry. We create and deliver world-changing solutions for a safer, healthier, and more sustainable future. For more than 75 years, we have collaborated across technical and scientific disciplines to discover and develop groundbreaking products and technologies and bring innovations and ideas to the marketplace.</p>",
    "directApply": true,
    "jobLocation": [
      {
        "@type": "Place",
        "address": {
          "@type": "PostalAddress",
          "postalCode": "80302",
          "addressRegion": "CO",
          "streetAddress": "2595 Canyon Blvd",
          "addressCountry": "US",
          "addressLocality": "Boulder",
          "postOfficeBoxNumber": "UNAVAILABLE"
        }
      }
    ],
    "validThrough": "2027-04-28T04:00:00.000Z",
    "employmentType": "FULL_TIME",
    "hiringOrganization": {
      "name": "SRI International",
      "@type": "Organization",
      "sameAs": "https://www.sri.com/"
    },
    "occupationalCategory": "Engineering"
  },
  "detail_meta": {
    "url": "https://careers-sri.icims.com/jobs/6381/sr-research-engineer---fpga-design/job?in_iframe=1",
    "http_status": 200,
    "content_type": "text/html;charset=UTF-8",
    "response_bytes": 38434,
    "compact_response_bytes": 6706,
    "original_response_bytes": 38434
  },
  "sitemap_job": {
    "id": "6381",
    "url": "https://careers-sri.icims.com/jobs/6381/sr-research-engineer---fpga-design/job",
    "slug": "sr-research-engineer---fpga-design",
    "lastmod": "2026-05-29T17:12:44-04:00"
  },
  "detail_errors": []
}