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System test and characterization engineer

Avicena Tech, Corp. · Sunnyvale, CA, United States · On Site · Active · Rippling ATS

Job facts

FieldValue
CompanyAvicena Tech, Corp.
TitleSystem test and characterization engineer
Normalized title-
Department / teamSystem test & Characterization
LocationSunnyvale, CA, United States
Work modelOn Site
Employment typeFull Time
Salary-
Statusactive
ATS providerRippling ATS
Posted / first seen2026-04-13 / 2026-05-29
Changed / last seen2026-06-06 / 2026-06-06

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Linked records

CompanyAvicena Tech, Corp.
Source975aa5ec-8f41-46cf-b409-2232313db55e
ATS providerRippling ATS

Description

company Avicena is a privately held company developing microLED based ultra-low power high bandwidth interconnects for chip-to-chip communications.  This technology will revolutionize High-Performance (HPC) and Cloud computing, as well as other industries where low power interconnects are critical like camera sensors, autonomous vehicles, and aerospace. Avicena is headquartered in Sunnyvale, California with a development center in Edinburgh, Scotland. The company was founded in 2019 by leading technologists from the optical networking industry with a track record of delivering breakthrough products.  ( www.avicena.tech ) role Responsibilities: Lead a team of engineers to characterize optical transmitters, optical receivers and link performance of highly parallel opto-electronic interfaces. Develop and maintain optical transmission system testing bed for full characterization of optical components and modules as well as system performance measurements. Define and run link DOEs using uLED on ASIC transmitters, fiber bundle as transmission and PD on ASIC as rece iver s. Characterize various aspects of both existing and potential future optical components such as evaluating signal-to-noise ratio (SNR), receiver sensitivity, bit-error-rate (BER), crosstalk, power consumptions and link budget of the transmission system Work with PCBA design engineers to design, fabricate and bring up test boards. Experience in schematic capture, circuit simulation and PCB design guidance Qualifications: MS or PhD in electrical engineering or physics with 3+ years of experience Expertise with optical transceiver circuits such as Trans-impedance Amplifier (TIA), laser/led drivers and photodetectors Familiarity with datacenter class optical module designs for Quad Small Form-factor Pluggable Octal Small Form Factor Pluggable (QSFP)/(OSFP) form factor pluggable modules or emerging Near-Packaged Optics (NPO) or Co-Packaged Optics (CPO) approaches. Experience with optical transceiver test methodologies Familiarity with industry standards including IEEE Ethernet standards, OIF standards and MSAs Preferrred Qualifications: Ability to work cross-functionally with ASIC, packaging and optical design teams and provide clear technical inputs Strong verbal and written communication skills, and ability to articulate and engage with both technical and non-technical stakeholders at all levels Ability to code scripts in python for validation and data analysis Working knowledge of high-speed test instruments such as VNAs, sampling and real time oscilloscopes and spectrum analyzers Hands-on lab experience especially with probed/free space coupled (using stages) optical systems

Full job record

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Source ID975aa5ec-8f41-46cf-b409-2232313db55e
Board ID975aa5ec-8f41-46cf-b409-2232313db55e
Providerrippling
Provider Job Keyceb0174a-2557-4834-821e-ea4b62f98b46
TitleSystem test and characterization engineer
Normalized Title—
Statusactive
Activeyes
Location TextSunnyvale, CA, United States
DepartmentSystem test & Characterization
Team—
Employment Typefull_time
Workplace Typeon_site
Remote Policy—
CountryUnited States
RegionCA
CitySunnyvale
Salary Raw—
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Source URLhttps://ats.rippling.com/general/jobs/ceb0174a-2557-4834-821e-ea4b62f98b46
Apply URLhttps://ats.rippling.com/general/jobs/ceb0174a-2557-4834-821e-ea4b62f98b46
First Seen At2026-05-29 07:13:36Z
Last Seen At2026-06-06 08:45:46Z
Last Checked At2026-06-06 08:45:46Z
Last Changed At2026-06-06 08:45:46Z
Inactive At—
Source Posted At2026-04-13 18:44:12Z
Source Updated At—
Raw Payload Uris3://job-postings-prod-raw-590183727216/raw/provider=rippling/board=general/date=2026-06-06/2026-06-06T08-45-45-695Z-8efdc24749320309cc94abbcb3ddd9296d1225febbdcc3aaf07fee3eb4764109.json
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      "role": "<meta><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">Responsibilities:</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Lead a team of engineers to characterize optical transmitters, optical</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">receivers</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">and link performance of highly parallel opto-electronic interfaces.</span></li></ul><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Develop and</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">maintain</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">optical transmission system testing bed</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">for</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">full characterization of optical components and modules as well as system performance measurements.</span></li></ul><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Define and run link DOEs using</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">uLED</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">on ASIC transmitters, fiber bundle as transmission and PD on ASIC as rece</span><span style=\"font-size:11pt;white-space:pre-wrap;\">iver</span><span style=\"font-size:11pt;white-space:pre-wrap;\">s.</span></li></ul><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Characterize</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">various aspects of both existing and potential future optical components</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">such as</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">evaluating signal-to-noise ratio (SNR),</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">receiver sensitivity,</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">bit-error-rate (BER), crosstalk, power</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">consumptions</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">and link budget</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">of the transmission system</span></li></ul><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Work with PCBA design</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">engineers</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">to design, fabricate and bring up test boards. Experience in</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">schematic capture, circuit</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">simulation</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">and PCB design guidance&nbsp;</span></li></ul><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">Qualifications:</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">MS or PhD in electrical engineering</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">or</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">physics with</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">3+</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">years of experience</span></li></ul><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Expertise</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">with optical transceiver circuits such as Trans-impedance Amplifier (TIA), laser/led</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">drivers</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">and photodetectors</span></li></ul><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Familiarity with datacenter class optical module</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">designs</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">for</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">Quad Small Form-factor Pluggable Octal Small Form Factor Pluggable (QSFP)/(OSFP) form factor pluggable modules</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">or</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">emerging</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">Near-Packaged Optics (NPO) or Co-Packaged Optics (CPO) approaches.</span></li></ul><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Experience with optical transceiver test methodologies</span></li></ul><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Familiarity with industry standards including IEEE Ethernet standards, OIF standards and MSAs</span></li></ul><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">Preferrred Qualifications:</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Ability to work cross-functionally with ASIC, packaging and optical design teams and provide clear technical inputs</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Strong verbal and written communication skills, and ability to articulate and engage with both technical and non-technical stakeholders at all levels</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Ability to code scripts in python for validation and data analysis&nbsp;</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Working knowledge of high-speed test instruments such as VNAs, sampling and real time oscilloscopes</span><span style=\"white-space:pre-wrap;\">&nbsp;</span><span style=\"font-size:11pt;white-space:pre-wrap;\">and spectrum analyzers</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Hands-on lab experience especially with probed/free space coupled (using stages) optical systems</span></li></ul>",
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            "title": "Pronouns",
            "required": false,
            "fieldData": {},
            "fieldType": "PRONOUN"
          },
          {
            "oid": "current_company",
            "title": "Current company",
            "required": false,
            "fieldData": {},
            "fieldType": "SHORT_ANSWER"
          },
          {
            "oid": "phone_number",
            "title": "Phone number",
            "required": true,
            "fieldData": {},
            "fieldType": "PHONE_NUMBER"
          },
          {
            "oid": "location",
            "title": "Location (city only)",
            "required": true,
            "fieldData": {},
            "fieldType": "SHORT_ANSWER"
          },
          {
            "oid": "resume",
            "title": "Resume",
            "required": true,
            "fieldData": {},
            "fieldType": "FILE"
          },
          {
            "oid": "cover_letter",
            "title": "Cover letter",
            "required": false,
            "fieldData": {},
            "fieldType": "FILE"
          }
        ]
      },
      "additionalQuestions": null
    },
    "hasAIEvaluationsEnabled": false,
    "eeocQuestionnaireEnabled": true,
    "applicationConfirmationTemplate": "6684936164e1ad69f05e9d5c",
    "eeocQuestionnaireEnabledForJobPost": true
  },
  "detail_meta": {
    "url": "https://ats.rippling.com/api/v2/board/general/jobs/ceb0174a-2557-4834-821e-ea4b62f98b46",
    "http_status": 200,
    "content_type": "application/json",
    "response_bytes": 16327
  },
  "detail_errors": []
}
Get this page with API

Rendered from the bluedoor Job Postings API. Reproduce it:

GET https://api.bluedoor.sh/job-postings/v1/jobs/a356c4bfd6e1c2da516f6ee5bb30f347a5a813dd?include=descriptionJSON
GET https://api.bluedoor.sh/job-postings/v1/orgs/c840fd90-50b5-48c0-b289-dffed50c1cc1JSON
GET https://api.bluedoor.sh/job-postings/v1/sources/975aa5ec-8f41-46cf-b409-2232313db55eJSON
GET https://api.bluedoor.sh/job-postings/v1/jobs/a356c4bfd6e1c2da516f6ee5bb30f347a5a813dd/eventsJSON

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