Senior FPGA Engineer (Algo)

DRW is a diversified trading firm with over 3 decades of experience bringing sophisticated technology and exceptional people together to operate in markets around the world. We value autonomy and the ability to quickly pivot to capture opportunities, so we operate using our own capital and trading at our own risk. Headquartered in Chicago with offices throughout the U.S., Canada, Europe, and Asia, we trade a variety of asset classes including Fixed Income, ETFs, Equities, FX, Commodities and Energy across all major global markets. We have also leveraged our expertise and technology to expand into three non-traditional strategies: real estate, venture capital and cryptoassets. We operate with respect, curiosity and open minds. The people who thrive here share our belief that it’s not just what we do that matters–it's how we do it. DRW is a place of high expectations, integrity, innovation and a willingness to challenge consensus. We are currently seeking a FPGA Enginee r to join one of our trading teams. While DRW has been leveraging FPGA technology for a number of years, you will have the opportunity to build an FPGA application from scratch for an existing team. We’re seeking a candidate that has a strong understanding of software and hardware interaction. This person will participate in the full development lifecycle, including system and block level testing, of low latency high throughput FPGA design. This role is for the Chicago office only. Responsibilities: Architect and implement new FPGA applications (synthesis, place & route, static timing analysis, documentation) from the ground up Research and evaluate a variety of cutting-edge FPGA hardware and technologies Propose creative solutions to overcome FPGA/hardware limitations Liaise directly with software and other design teams Conduct lab debugging and characterization of new hardware Candidate Requirements: Bachelor’s degree or higher, Computer/Electrical Engineering with 3+ years of experience within the field; (Master’s degree or higher also counts for experience) Solid Hardware Engineering experience, especially with FPGA Highly autonomous with a can-do attitude able to lead an FPGA based project from system requirements to production Strong capacity to quickly evaluate FPGA based project feasibility based on hardware limitation Strong skills in RTL logic design (Verilog) and verification; 2+ years of experience writing Verilog Experience in FPGA design flow including synthesis, place & route , static timing analysis is required Experience with the design of system-on-chip (SOC) architectures, memory & processor subsystems, networking, and peripheral interconnect is required Knowledge of the TCP/IP stack Strong working knowledge of either XILINX or ALTERA FPGA design flow Experience with functional verification utilizing high-level methodologies (e.g. System Verilog) is a plus. Excellent research and data gathering skills The annual base salary range for this position is $150,000 to $250,000 depending on the candidate’s experience, qualifications, and relevant skill set. The position is also eligible for an annual discretionary bonus. In addition, DRW offers a comprehensive suite of employee benefits including group medical, pharmacy, dental and vision insurance, 401k (with discretionary employer match), short and long-term disability, life and AD&D insurance, health savings accounts, and flexible spending accounts. For more information about DRW's processing activities and our use of job applicants' data, please view our Privacy Notice at https://drw.com/privacy-notice . California residents, please review the California Privacy Notice for information about certain legal rights at https://drw.com/california-privacy-notice . #LI-BL1

{
  "content_hash": "60fb2c7db7c7aac863ded1d30b92aefc96d3ac925040cb258980fb187d888387",
  "source_hash": "122bc400846392f232ba2f93609d0d474f655f8108765732cda9c85cb67ee722",
  "last_changed_at": "2026-05-29T22:43:12.942Z",
  "active_status": "active"
}

{
  "language": "en",
  "location": {
    "raw": "Chicago",
    "city": "Chicago",
    "region": "IL",
    "country": "United States",
    "is_remote": false,
    "confidence": 0.75
  },
  "salary_max": 250000,
  "salary_min": 150000,
  "inferred_at": "2026-06-06T07:34:49.197Z",
  "launch_scope": {
    "reason": "english_us_canada",
    "included": true,
    "language": "en",
    "location": {
      "raw": "Chicago",
      "city": "Chicago",
      "region": "IL",
      "country": "United States",
      "is_remote": false,
      "confidence": 0.75
    },
    "countries": [
      "United States"
    ]
  },
  "remote_policy": null,
  "salary_period": "year",
  "workplace_type": null,
  "salary_currency": "USD"
}

{}

{
  "title": "Senior FPGA Engineer (Algo)",
  "offices": [
    {
      "id": 17428,
      "name": "Chicago",
      "location": "Chicago, IL, United States",
      "child_ids": [],
      "parent_id": null
    }
  ],
  "language": "en",
  "location": {
    "name": "Chicago"
  },
  "metadata": [
    {
      "id": 88665,
      "name": "Employment Type",
      "value": "Regular",
      "value_type": "single_select"
    },
    {
      "id": 89902,
      "name": "Target Start Date",
      "value": "Immediate",
      "value_type": "short_text"
    },
    {
      "id": 89903,
      "name": "Website Job Category Filter",
      "value": [
        "Technology"
      ],
      "value_type": "multi_select"
    }
  ],
  "updated_at": "2026-05-06T19:01:52-04:00",
  "departments": [
    {
      "id": 87410,
      "name": "Algo Technology & Software Engineering",
      "child_ids": [],
      "parent_id": 25691
    }
  ],
  "company_name": "DRW ",
  "requisition_id": 3170998,
  "first_published": "2025-06-13T10:23:28-04:00",
  "application_deadline": null
}