Home › Companies › Heads Up Technologies › Senior FPGA Engineer
Senior FPGA Engineer
Heads Up Technologies · Dallas, TX, United States · On Site · Active · $180,000–$210,000 / year · Rippling ATS
Job facts
| Field | Value |
|---|---|
| Company | Heads Up Technologies |
| Title | Senior FPGA Engineer |
| Normalized title | - |
| Department / team | Design Engineering |
| Location | Dallas, TX, United States |
| Work model | On Site |
| Employment type | Full Time |
| Salary | $180,000–$210,000 / year |
| Status | active |
| ATS provider | Rippling ATS |
| Posted / first seen | 2026-02-25 / 2026-05-29 |
| Changed / last seen | 2026-06-06 / 2026-06-06 |
Related slices
| Page | What it contains | Open |
|---|---|---|
| Company jobs | Active postings from Heads Up Technologies. | Open |
| Company breakdowns | Role, location, ATS, and work model facets for this company. | Open |
| ATS provider jobs | Active postings observed through Rippling ATS. | Open |
| Provider filtered search | The same provider as a filtered job collection. | Open |
| City jobs | Active postings in Dallas. | Open |
| Department jobs | Active postings in Design Engineering. | Open |
| Work model jobs | Active On Site postings. | Open |
| Lifecycle events | Open, update, close, and reopen events for this posting. | Open |
| Original posting | Canonical source or apply URL captured from the ATS. | Open |
Linked records
| Company | Heads Up Technologies |
| Source | 6debe94e-9e67-4469-84d8-705cb59690e3 |
| ATS provider | Rippling ATS |
Description
company
At Heads Up Technologies, we’re redefining what’s possible in the air. Since our beginnings in a Dallas hangar in 1985, we’ve grown into a global leader in aviation technology driven by innovation, precision, and a relentless pursuit of better in-flight experiences. From pioneering digital audio and lighting systems to uniting with STG Aerospace and ALTO Aviation under one brand, we continue to lead the way in cabin systems integration for business and commercial aircraft. Join us as we shape the future of aviation where lighting, entertainment, safety, and audio come together to elevate every journey.
The Innovative Advantage team specializes in high-performance embedded audio, video, and data distribution systems for private jet aircraft. Our team is dedicated to innovation, creating seamless in-flight entertainment and connectivity solutions that make air travel more enjoyable. We take pride in enabling the ultimate passenger experience by delivering reliable, high-quality products trusted by industry leaders.
role
About the role
We’re looking for a Senior FPGA Engineer to join our team in Kirkland, WA or Addison, TX. This is an on-site position requiring strong technical expertise in Xilinx FPGA development and video/audio processing for real-time 4K+ video delivery in aircraft environments.
Key Details
Work Days and Hours : Our normal working hours are 8:00 am to 5:00 pm Monday-Friday, with the flexibility to work a 4x10 (M-TR) or 5x8 (M-F) schedule. Location : This is a full-time onsite position located in Kirkland, WA or Dallas, TX. Candidates must be currently located in the greater Seattle, or Dallas/Addison area or willing to relocate. Kirkland, WA Compensation : $180,000 to $210,000 per year. Salary will be adjusted based on geographic location. Work Eligibility : Must be a U.S. Citizen and authorized to work in the United States.
What you'll do
Design and implement complex video/audio processing algorithms using Verilog targeting Xilinx devices. Implement video pipelines including up/down conversion (4K/UHD, HDR/SDR, scaling, color conversion) and audio processing (IEC 60958 LPCM and IEC 61937 Dolby/DTS, I2S TDM, AES67, CobraNet, Dante, DSP functions). Integrate high-speed interfaces (PCIe, DDR, Ethernet, HDMI, SDI). Support USB-based 4K video playback in an embedded cabin environment. Conduct simulation, verification, and laboratory debugging using logic analyzers, oscilloscopes, and custom simulations. Collaborate with hardware and software teams on design partitioning and planning/implementation, board bring-up, timing closure, and performance optimization. Collaborate with cross-functional teams, including software, hardware, and systems engineering to develop an optimal architecture and develop FPGA requirements Analyze and interpret hardware schematics to support integration— no board design required. Integrate IP from other FPGA designers and maintain code reuse standards and practices. Create thorough design documents, specifications, and interface definitions Contribute to existing projects with opportunities to lead new product development in the future.
What will make you successful in this role (skills)
Required Qualifications:
8–10+ years of hands-on FPGA development experience. Proven expertise with Xilinx FPGAs and related toolchains (Vivado, etc.). Strong skills in creating concise and clear code in Verilog targeting Xilinx IP integration. Extensive experience with video I/O standards and interfaces: HDMI, DisplayPort, MIPI CSI-2/DSI-2, GMSL, GigE, SDI; integration and customization of vendor/IP cores Deep experience with video/audio pipelines, including real-time 4K signal processing and handling digital audio streams. Proficiency in high-speed digital design methods and best practices supporting multiple clock domains, AXI streaming and memory-mapped IP interfaces, coherent configuration and status across designs, and clean clock crossings. Familiarity with FPGA and processor system co-design (external and on-die hard/soft IP processor architectures). Zynq platform experience is strongly desired. Ability to work in a collaborative, fast-paced, hardware/software integrated environment.
Preferred Qualifications:
Experience with video compression/decompression and/or audio resampling/manipulation techniques. Understanding of Linux environments, including scripting for FPGA development tools. Exposure to DevOps practices in software/firmware CI/CD pipelines. Strong cross-disciplinary collaboration skills—comfortable "wearing multiple hats."
Perks and Benefits
A competitive compensation package, including medical, dental, and vision coverage. Opportunities to plan for the future with our 401(k) program. Paid Time Off - Take the well-deserved time off you need. Life Insurance - Enjoy the peace of mind that comes with life insurance coverage. Health and wellness benefits including Health Savings Account (HSA) option. Opportunities for professional growth and development within the company. Positive and inclusive work culture with a laid-back work environment that promotes a healthy work-life balance. Flexibility in your schedule to accommodate personal needs.
Why Join Us?
Technical Excellence: Work with experts in embedded systems, audio/video distribution, and aviation technology. Innovative Culture: Be part of a team that values curiosity, continuous learning, and creative problem-solving. Meaningful Projects: Contribute to next-generation in-flight entertainment and data systems used in luxury aircraft. Professional Growth: Expand your skills through mentorship, hands-on development, and exposure to a wide range of technologies. Competitive Compensation: Enjoy a compensation package that reflects your experience and contributions.
Full job record
| Job ID | 96451a9aa95dc6c09aacb4a31530c690bbe3218f |
| Org ID | 40d1c79a-b68e-4a92-8d73-c6b8d3d6f004 |
| Source ID | 6debe94e-9e67-4469-84d8-705cb59690e3 |
| Board ID | 6debe94e-9e67-4469-84d8-705cb59690e3 |
| Provider | rippling |
| Provider Job Key | 03f7cab7-6ca7-4688-8344-5d3e71e31450 |
| Title | Senior FPGA Engineer |
| Normalized Title | — |
| Status | active |
| Active | yes |
| Location Text | Dallas, TX, United States |
| Department | Design Engineering |
| Team | — |
| Employment Type | full_time |
| Workplace Type | on_site |
| Remote Policy | — |
| Country | United States |
| Region | TX |
| City | Dallas |
| Salary Raw | Compensation : $180,000 to $210,000 per year |
| Salary Min | 180,000 |
| Salary Max | 210,000 |
| Salary Currency | USD |
| Salary Period | year |
| Source URL | https://ats.rippling.com/heads-up-technologies/jobs/03f7cab7-6ca7-4688-8344-5d3e71e31450 |
| Apply URL | https://ats.rippling.com/heads-up-technologies/jobs/03f7cab7-6ca7-4688-8344-5d3e71e31450 |
| First Seen At | 2026-05-29 07:12:05Z |
| Last Seen At | 2026-06-06 08:45:10Z |
| Last Checked At | 2026-06-06 08:45:10Z |
| Last Changed At | 2026-06-06 08:45:10Z |
| Inactive At | — |
| Source Posted At | 2026-02-25 09:11:44Z |
| Source Updated At | — |
| Raw Payload Uri | s3://job-postings-prod-raw-590183727216/raw/provider=rippling/board=heads-up-technologies/date=2026-06-06/2026-06-06T08-45-09-280Z-400e4c28dc51a95e75c473c69e842c431ece2411d7d841f4c4fc34f464b2c8b6.json |
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"role": "<meta><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:10pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><br></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:17pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"color:rgb(37,57,90);font-size:17pt;white-space:pre-wrap;\">About the role</strong></b></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">We’re looking for a Senior FPGA Engineer to join our team in Kirkland, WA or Addison, TX. This is an on-site position requiring strong technical expertise in Xilinx FPGA development and video/audio processing for real-time 4K+ video delivery in aircraft environments.</span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:10pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><br></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:13pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:justify;\"><b><strong style=\"color:rgb(37,57,90);font-size:16pt;white-space:pre-wrap;\">Key Details</strong></b></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:justify;\"><span style=\"white-space:pre-wrap;\"> </span></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><b><strong style=\"color:rgb(37,57,90);white-space:pre-wrap;\">Work Days and Hours</strong></b><span style=\"color:rgb(37,57,90);white-space:pre-wrap;\">: Our normal working hours are 8:00 am to 5:00 pm Monday-Friday, with the flexibility to work a 4x10 (M-TR) or 5x8 (M-F) schedule.</span></li></ul><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><b><strong style=\"color:rgb(37,57,90);white-space:pre-wrap;\">Location</strong></b><span style=\"color:rgb(37,57,90);white-space:pre-wrap;\">: This is a full-time onsite position located in Kirkland, WA or Dallas, TX. Candidates must be currently located in the greater Seattle, or Dallas/Addison area or willing to relocate.</span></li></ul><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><b><strong style=\"color:rgb(37,57,90);white-space:pre-wrap;\">Kirkland, WA Compensation</strong></b><span style=\"color:rgb(37,57,90);white-space:pre-wrap;\">: $180,000 to $210,000 per year. Salary will be adjusted based on geographic location.</span></li></ul><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><b><strong style=\"color:rgb(37,57,90);white-space:pre-wrap;\">Work Eligibility</strong></b><span style=\"color:rgb(37,57,90);white-space:pre-wrap;\">: Must be a U.S. Citizen and authorized to work in the United States.</span></li></ul><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:18pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:justify;\"><br></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:18pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:justify;\"><b><strong style=\"color:rgb(37,57,90);font-size:18pt;white-space:pre-wrap;\">What you'll do</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);white-space:pre-wrap;\">Design and implement complex video/audio processing algorithms using Verilog targeting Xilinx devices.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);white-space:pre-wrap;\">Implement video pipelines including up/down conversion (4K/UHD, HDR/SDR, scaling, color conversion) and audio processing (IEC 60958 LPCM and IEC 61937 Dolby/DTS, I2S TDM, AES67, CobraNet, Dante, DSP functions).</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);white-space:pre-wrap;\">Integrate high-speed interfaces (PCIe, DDR, Ethernet, HDMI, SDI).</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);white-space:pre-wrap;\">Support USB-based 4K video playback in an embedded cabin environment.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);white-space:pre-wrap;\">Conduct simulation, verification, and laboratory debugging using logic analyzers, oscilloscopes, and custom simulations.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);white-space:pre-wrap;\">Collaborate with hardware and software teams on design partitioning and planning/implementation, board bring-up, timing closure, and performance optimization.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);white-space:pre-wrap;\">Collaborate with cross-functional teams, including software, hardware, and systems engineering to develop an optimal architecture and develop FPGA requirements</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);white-space:pre-wrap;\">Analyze and interpret hardware schematics to support integration— no board design required.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);white-space:pre-wrap;\">Integrate IP from other FPGA designers and maintain code reuse standards and practices.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);white-space:pre-wrap;\">Create thorough design documents, specifications, and interface definitions</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);white-space:pre-wrap;\">Contribute to existing projects with opportunities to lead new product development in the future.</span></li></ul><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:justify;\"><br></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:18pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:justify;\"><b><strong style=\"color:rgb(37,57,90);font-size:18pt;white-space:pre-wrap;\">What will make you successful in this role (skills)</strong></b></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:justify;\"><br></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:justify;\"><b><strong style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">Required Qualifications:</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">8–10+ years of hands-on FPGA development experience.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">Proven expertise with Xilinx FPGAs and related toolchains (Vivado, etc.).</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">Strong skills in creating concise and clear code in Verilog targeting Xilinx IP integration.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">Extensive experience with video I/O standards and interfaces: HDMI, DisplayPort, MIPI CSI-2/DSI-2, GMSL, GigE, SDI; integration and customization of vendor/IP cores</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">Deep experience with video/audio pipelines, including real-time 4K signal processing and handling digital audio streams.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">Proficiency in high-speed digital design methods and best practices supporting multiple clock domains, AXI streaming and memory-mapped IP interfaces, coherent configuration and status across designs, and clean clock crossings.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">Familiarity with FPGA and processor system co-design (external and on-die hard/soft IP processor architectures). Zynq platform experience is strongly desired.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">Ability to work in a collaborative, fast-paced, hardware/software integrated environment.</span></li></ul><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:justify;\"><br></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:justify;\"><b><strong style=\"color:rgb(37,57,90);white-space:pre-wrap;\">Preferred Qualifications:</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);white-space:pre-wrap;\">Experience with video compression/decompression and/or audio resampling/manipulation techniques.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);white-space:pre-wrap;\">Understanding of Linux environments, including scripting for FPGA development tools.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);white-space:pre-wrap;\">Exposure to DevOps practices in software/firmware CI/CD pipelines.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);white-space:pre-wrap;\">Strong cross-disciplinary collaboration skills—comfortable \"wearing multiple hats.\"</span></li></ul><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:justify;\"><br></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:18pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:justify;\"><b><strong style=\"color:rgb(37,57,90);font-size:18pt;white-space:pre-wrap;\">Perks and Benefits</strong></b><span style=\"color:rgb(37,57,90);font-size:18pt;white-space:pre-wrap;\"> </span></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">A competitive compensation package, including medical, dental, and vision coverage.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">Opportunities to plan for the future with our 401(k) program.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">Paid Time Off - Take the well-deserved time off you need.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">Life Insurance - Enjoy the peace of mind that comes with life insurance coverage.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">Health and wellness benefits including Health Savings Account (HSA) option.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">Opportunities for professional growth and development within the company.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">Positive and inclusive work culture with a laid-back work environment that promotes a healthy work-life balance.</span></li><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">Flexibility in your schedule to accommodate personal needs.</span></li></ul><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:justify;\"><br></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:18pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:justify;\"><b><strong style=\"color:rgb(37,57,90);font-size:18pt;white-space:pre-wrap;\">Why Join Us?</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"color:rgb(37,57,90);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">Technical Excellence: Work with experts in embedded systems, audio/video distribution, and aviation technology.</span></li><li style=\"color:rgb(37,57,90);font-size:10pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">Innovative Culture: Be part of a team that values curiosity, continuous learning, and creative problem-solving.</span></li><li style=\"color:rgb(37,57,90);font-size:10pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">Meaningful Projects: Contribute to next-generation in-flight entertainment and data systems used in luxury aircraft.</span></li><li style=\"color:rgb(37,57,90);font-size:10pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">Professional Growth: Expand your skills through mentorship, hands-on development, and exposure to a wide range of technologies.</span></li><li style=\"color:rgb(37,57,90);font-size:10pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:justify;\"><span style=\"color:rgb(37,57,90);font-size:11pt;white-space:pre-wrap;\">Competitive Compensation: Enjoy a compensation package that reflects your experience and contributions.</span></li></ul>",
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