Senior Firmware Engineer

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You'll help design and implement high-performance firmware across multiple systems.</span></p><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:12pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><br></p><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:12pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:12pt;white-space:pre-wrap;\">Your responsibilities will include:</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Developing high-performance firmware capable of handling large data payload while ensuring end-to-end data integrity.</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Working closely with hardware, electrical and chemistry teams to help define requirements and specifications.</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Architecting and implementing using bare metal languages such as C and C++</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Bringing expertise in low-level programming to develop reliable firmware with strict timing requirements.</span></li></ul><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:center;\"><br></p><hr><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><br></p><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:12pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:12pt;white-space:pre-wrap;\">Required Skills</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">6+ years of professional software development experience in a senior technical role.</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Expertise in C and C++.</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Deep, demonstrable understanding of memory management in embedded platforms.</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Proven ability to write performant, low-latency, and highly optimized code, particularly when dealing with large data payloads (multi-gigabyte scale).</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Experience designing and implementing firmware using high-speed buses (SPI, 1G/10G Ethernet, USB…).</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Experienced in using real-time operating systems such as FreeRTOS, DMA controllers, AXI bus, interrupt mechanisms and low-level threading implementation.</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Knowledge of IP protocols down to the physical layer</span></li></ul><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"white-space:pre-wrap;\">&nbsp;</strong></b></p><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:12pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:12pt;white-space:pre-wrap;\">Desired Skills</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Prior experience working directly with hardware development, bring-up, and troubleshooting.</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Understanding of FPGA and ASIC integration</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Bachelor's or master’s degree in computer science, electrical engineering, or a related field.</span></li></ul>",
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