Home › Companies › Eridu › Advanced Packaging Engineer
Advanced Packaging Engineer
Eridu · Saratoga, CA, United States · On Site · Active · $230,000–$275,000 / year · Rippling ATS
Job facts
| Field | Value |
|---|---|
| Company | Eridu |
| Title | Advanced Packaging Engineer |
| Normalized title | - |
| Department / team | Systems Engineering |
| Location | Saratoga, CA, United States |
| Work model | On Site |
| Employment type | Full Time |
| Salary | $230,000–$275,000 / year |
| Status | active |
| ATS provider | Rippling ATS |
| Posted / first seen | 2026-03-10 / 2026-05-29 |
| Changed / last seen | 2026-06-06 / 2026-06-06 |
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| Page | What it contains | Open |
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| Company jobs | Active postings from Eridu. | Open |
| Company breakdowns | Role, location, ATS, and work model facets for this company. | Open |
| ATS provider jobs | Active postings observed through Rippling ATS. | Open |
| Provider filtered search | The same provider as a filtered job collection. | Open |
| City jobs | Active postings in Saratoga. | Open |
| Department jobs | Active postings in Systems Engineering. | Open |
| Work model jobs | Active On Site postings. | Open |
| Lifecycle events | Open, update, close, and reopen events for this posting. | Open |
| Original posting | Canonical source or apply URL captured from the ATS. | Open |
Linked records
| Company | Eridu |
| Source | 2e3b3faf-1f18-443b-b03c-ab436c316a6b |
| ATS provider | Rippling ATS |
Description
company
About Eridu Eridu is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate AI data centers to deliver Faster AI . Today’s AI performance is frequently limited by communication bottlenecks. Eridu introduces multiple industry-first innovations across silicon, packaging, software, and systems to deliver an order of magnitude improvement in performance and unlock greater GPU utilization to speed training job completion times and tokens-per-second for more profitable inference. We do this while simultaneously reducing capital and power costs and improving reliability.
The company’s solutions and value proposition have been widely validated by leading hyperscalers.
Eridu has raised over $200M to date including its most recent, oversubscribed Series A round. The company is led by a veteran team of Silicon Valley executives who have delivered multiple billion dollar product lines and led multiple companies to billion dollar exits, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ: INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (the world’s leading micro-LED company). The company is in execution mode and has a world-class engineering team with decades of experience in state-of-the-art silicon, packaging, optics, software, and systems. Eridu is working with best-in-class supply chain partners including silicon, packaging and systems.
Visit our website eridu.ai to learn more.
role
Position Overview We are seeking a highly experienced Advanced Package Engineer to lead system module packaging and advanced single chip Flip Chip IC integration for next-generation high-performance networking and compute platforms.
This role owns the end-to-end productization of composite system modules assembly, driving manufacturing readiness and product implementation consisting of organic interposers, organic substrates, cooling solutions, boards, and mechanical hardware. You will architect and deliver complete module packaging assembly solutions. This role also owns leading flip-chip single-die Flip Chip packages and advanced 2.5D integration.
You will operate as the technical owner of system module packaging, working hands-on with contract manufacturers, substrate vendors, OSATs, foundry partners, and internal silicon/system teams to translate ambitious architectures into high-volume, production-ready products.
This is a highly visible technical leadership role for an engineer who thrives at the intersection of system architecture, packaging design, mechanical modeling, manufacturing, and qualification.
Responsibilities System Module Packaging & Manufacturing Lead
Own the full lifecycle of system module packaging assembly integration from architecture through volume production consisting of organic interposers, organic substrates, cooling solutions, boards, and mechanical hardware:
Lead module manufacturing and integration with contract manufacturers and internal engineering teams. Own system module packaging qualification using Mechanical Test Vehicles (MTVs). Drive module construction architectures, BOMs, and design approvals. Drive mechanical modeling activities including warpage, stress, and coplanarity. Plan and execute module builds, assembly setup, yield learning, and yield data collection. Lead module qualification, failure analysis, root cause identification, and corrective action closure. Drive PCB SMT assembly DOE, yield tracking, and continuous improvement initiatives. Evaluate PCB SMT rework processes using real sample parts and production data. Define and validate organic substrate rework strategies. Propose and sign off daisy-chain layouts for organic substrates. Own regular technical engagement cadence with manufacturing partners. Establish SMT yield goals, operational metrics, and improvement roadmaps. Productize module assembly with system integration partners. Lead module manufacturing readiness reviews and execution. Drive SMT soldering technology innovation through test vehicles. Perform manufacturing risk mitigation, and schedule alignment. Design and support module-level warpage experiments and mitigation strategies.
Organic Substrate and Board Manufacturing Technical Lead
Act as technical owner for organic substrate readiness and embedded component integration:
Drive implementation of embedded component technologies. Own substrate BOM development and engineering builds. Define coplanarity plans and acceptance criteria. Coordinate substrate and board electrical and mechanical design and signoff. Lead manufacturing, tooling cycle time optimization, yield learning, and qualification strategies. Monitor product impedance and drive failure analysis on electrical excursions. Monitor prototype and production yields. Lead design rule alignment, cost tradeoffs, material selection, electrical and mechanical simulations, and reliability assessments.
Advanced Packaging Architecture Lead
Provide technical leadership across emerging packaging domains:
Lead flip-chip package development: Coordinate electrical and mechanical modeling of high-power, high-bandwidth organic single chip flip chip packages Drive assembly integration with OSAT partners Coordinate substrate layout design Design package mechanical construction Contribute to system architecture decisions involving: 2.5D integration CoWoS-class interposers 3D packaging and stacking approaches Support CPO packaging floor planning and construction trade studies
Qualifications BS, or MS, or PhD in Electrical Engineering, Mechanical Engineering, Materials Science, or related field. 8+ years of experience in system module assembly and advanced IC packaging manufacturing. Hands-on experience with: Organic substrates and boards (design, assembly, qualification, production) SMT assembly, yield management, and rework Single Chip Flip-chip packaging construction, and materials Understanding mechanical modeling impacts (warpage, coplanarity, stress. thermal) on construction, materials, and design Proven track record leading system module packaging assembly with contract manufacturing partners, OSATs, and foundry engagements, which includes as a module, organic interposers, organic substrates, cooling configuration, boards, and mechanical hardware. Good understanding of high-speed / high-power package constraints. Experience driving Mechanical Test Vehicles (MTVs), DOE, yield learning builds, and qualification programs. Demonstrated ability to independently own complex cross-functional deliverables from architecture through prototyping and production. Experience with system-level module packaging including cooling interfaces, boards, substrates, and mechanical hardware. Working knowledge of advanced Flip Chip packaging architectures including: 2.5D integration and CoWoS-class interposers 3D packaging and stacked die approaches Experience with embedded passive component technologies such as capacitors. Failure analysis leadership across electrical and mechanical domains. Expertise in System module packaging and single chip packaging qualifications and testing. Background in high-performance AI accelerators, or networking hardware. Comfortable operating in fast-moving, dynamic environments with large technical scope.
What Makes This Role Unique
Direct ownership of real system products entering manufacturing — not just concept designs. Technical leadership across substrates → SMT → system modules → advanced IC packaging. Opportunity to architect next-generation system module platforms. High visibility across silicon, system, and manufacturing organizations. Deep engagement with leading global manufacturing partners. A chance to solve packaging challenges at true system scale.
Why Join Us? At Eridu, you’ll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI infrastructure solutions, transforming the performance of AI data centers.
The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.
Notice to Recruiting Agencies Eridu does not accept unsolicited resumes or candidate profiles from staffing agencies or third-party recruiters. Any candidate submitted to Eridu without prior written authorization from our recruiting team will be considered unsolicited and will become the property of Eridu. Eridu reserves the right to pursue and hire such candidates without any obligation to pay fees. Recruiting agencies are expressly instructed not to contact hiring managers, employees, or executives regarding open positions.
Full job record
| Job ID | 83ba74e769af834afada61c040ce36e957c7ca87 |
| Org ID | d05d9cdc-fa71-444b-b57a-6140fe525606 |
| Source ID | 2e3b3faf-1f18-443b-b03c-ab436c316a6b |
| Board ID | 2e3b3faf-1f18-443b-b03c-ab436c316a6b |
| Provider | rippling |
| Provider Job Key | b1035e91-3c99-4391-a5e3-6c3b681e5882 |
| Title | Advanced Packaging Engineer |
| Normalized Title | — |
| Status | active |
| Active | yes |
| Location Text | Saratoga, CA, United States |
| Department | Systems Engineering |
| Team | — |
| Employment Type | full_time |
| Workplace Type | on_site |
| Remote Policy | — |
| Country | United States |
| Region | CA |
| City | Saratoga |
| Salary Raw | USD 230000-275000 YEAR |
| Salary Min | 230,000 |
| Salary Max | 275,000 |
| Salary Currency | USD |
| Salary Period | year |
| Source URL | https://ats.rippling.com/eridu-ai/jobs/b1035e91-3c99-4391-a5e3-6c3b681e5882 |
| Apply URL | https://ats.rippling.com/eridu-ai/jobs/b1035e91-3c99-4391-a5e3-6c3b681e5882 |
| First Seen At | 2026-05-29 07:14:02Z |
| Last Seen At | 2026-06-06 19:44:35Z |
| Last Checked At | 2026-06-06 19:44:35Z |
| Last Changed At | 2026-06-06 19:44:35Z |
| Inactive At | — |
| Source Posted At | 2026-03-10 20:27:26Z |
| Source Updated At | — |
| Raw Payload Uri | s3://job-postings-prod-raw-590183727216/raw/provider=rippling/board=eridu-ai/date=2026-06-06/2026-06-06T19-44-33-762Z-4b761a1811184974f9facfa7bb3d3a7e8696180848a08b199b5b79a934e7d18e.json |
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"role": "<meta><h4 style=\"font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:18pt;font-weight:600;letter-spacing:0px;margin-top:12px;margin-bottom:4px;padding-left:0px;\"><b><strong style=\"white-space:pre-wrap;\">Position Overview</strong></b></h4><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"white-space:pre-wrap;\">We are seeking a highly experienced Advanced Package Engineer to lead system module packaging and advanced single chip Flip Chip IC integration for next-generation high-performance networking and compute platforms.</span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"white-space:pre-wrap;\">This role owns the end-to-end productization of composite system modules assembly, driving manufacturing readiness and product implementation consisting of organic interposers, organic substrates, cooling solutions, boards, and mechanical hardware. You will architect and deliver complete module packaging assembly solutions. This role also owns leading flip-chip single-die Flip Chip packages and advanced 2.5D integration.</span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><br></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"white-space:pre-wrap;\">You will operate as the technical owner of system module packaging, working hands-on with contract manufacturers, substrate vendors, OSATs, foundry partners, and internal silicon/system teams to translate ambitious architectures into high-volume, production-ready products.</span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><br></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"white-space:pre-wrap;\">This is a highly visible technical leadership role for an engineer who thrives at the intersection of system architecture, packaging design, mechanical modeling, manufacturing, and qualification.</span></p><h4 style=\"font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:18pt;font-weight:600;letter-spacing:0px;margin-top:12px;margin-bottom:4px;padding-left:0px;\"><b><strong style=\"white-space:pre-wrap;\">Responsibilities </strong></b></h4><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"white-space:pre-wrap;\">System Module Packaging & Manufacturing Lead</strong></b></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"white-space:pre-wrap;\">Own the full lifecycle of system module packaging assembly integration from architecture through volume production consisting of organic interposers, organic substrates, cooling solutions, boards, and mechanical hardware:</span></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Lead module manufacturing and integration with contract manufacturers and internal engineering teams.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Own system module packaging qualification using Mechanical Test Vehicles (MTVs).</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Drive module construction architectures, BOMs, and design approvals.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Drive mechanical modeling activities including warpage, stress, and coplanarity.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Plan and execute module builds, assembly setup, yield learning, and yield data collection.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Lead module qualification, failure analysis, root cause identification, and corrective action closure.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Drive PCB SMT assembly DOE, yield tracking, and continuous improvement initiatives.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Evaluate PCB SMT rework processes using real sample parts and production data.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Define and validate organic substrate rework strategies.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Propose and sign off daisy-chain layouts for organic substrates.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Own regular technical engagement cadence with manufacturing partners.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Establish SMT yield goals, operational metrics, and improvement roadmaps.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Productize module assembly with system integration partners.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Lead module manufacturing readiness reviews and execution.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Drive SMT soldering technology innovation through test vehicles.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Perform manufacturing risk mitigation, and schedule alignment.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Design and support module-level warpage experiments and mitigation strategies.</span></li></ul><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><br></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"white-space:pre-wrap;\">Organic Substrate and Board Manufacturing Technical Lead</strong></b></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"white-space:pre-wrap;\">Act as technical owner for organic substrate readiness and embedded component integration:</span></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Drive implementation of embedded component technologies.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Own substrate BOM development and engineering builds.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Define coplanarity plans and acceptance criteria.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Coordinate substrate and board electrical and mechanical design and signoff.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Lead manufacturing, tooling cycle time optimization, yield learning, and qualification strategies.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Monitor product impedance and drive failure analysis on electrical excursions.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Monitor prototype and production yields.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Lead design rule alignment, cost tradeoffs, material selection, electrical and mechanical simulations, and reliability assessments.</span></li></ul><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><br></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"white-space:pre-wrap;\">Advanced Packaging Architecture Lead</strong></b></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"white-space:pre-wrap;\">Provide technical leadership across emerging packaging domains:</span></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Lead flip-chip package development:</span></li><li style=\"font-size:11pt;list-style:none;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><ul data-pattern=\"discCircleSquare\" data-depth=\"2\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin-left:0px;margin-right:0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:circle;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Coordinate electrical and mechanical modeling of high-power, high-bandwidth organic single chip flip chip packages</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Drive assembly integration with OSAT partners</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Coordinate substrate layout design</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span 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style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">BS, or MS, or PhD in Electrical Engineering, Mechanical Engineering, Materials Science, or related field.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">8+ years of experience in system module assembly and advanced IC packaging manufacturing.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Hands-on experience with:</span></li><li style=\"font-size:11pt;list-style:none;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><ul data-pattern=\"discCircleSquare\" data-depth=\"2\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin-left:0px;margin-right:0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:circle;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Organic substrates and boards (design, assembly, qualification, production)</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">SMT assembly, yield management, and rework</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Single Chip Flip-chip packaging construction, and materials</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Understanding mechanical modeling impacts (warpage, coplanarity, stress. thermal) on construction, materials, and design</span></li></ul></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Proven track record leading system module packaging assembly with contract manufacturing partners, OSATs, and foundry engagements, which includes as a module, organic interposers, organic substrates, cooling configuration, boards, and mechanical hardware.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Good understanding of high-speed / high-power package constraints.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Experience driving Mechanical Test Vehicles (MTVs), DOE, yield learning builds, and qualification programs.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Demonstrated ability to independently own complex cross-functional deliverables from architecture through prototyping and production.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Experience with system-level module packaging including cooling interfaces, boards, substrates, and mechanical hardware.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Working knowledge of advanced Flip Chip packaging architectures including:</span></li><li style=\"font-size:11pt;list-style:none;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><ul data-pattern=\"discCircleSquare\" data-depth=\"2\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin-left:0px;margin-right:0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:circle;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">2.5D integration and CoWoS-class interposers</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">3D packaging and stacked die approaches</span></li></ul></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Experience with embedded passive component technologies such as capacitors.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Failure analysis leadership across electrical and mechanical domains.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Expertise in System module packaging and single chip packaging qualifications and testing.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Background in high-performance AI accelerators, or networking hardware.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Comfortable operating in fast-moving, dynamic environments with large technical scope.</span></li></ul><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:18pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><br></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:18pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">What Makes This Role Unique</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Direct ownership of real system products entering manufacturing — not just concept designs.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Technical leadership across substrates → SMT → system modules → advanced IC packaging.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Opportunity to architect next-generation system module platforms.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">High visibility across silicon, system, and manufacturing organizations.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Deep engagement with leading global manufacturing partners.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">A chance to solve packaging challenges at true system scale.</span></li></ul><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:start;\"><br></p><h4 style=\"font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:18pt;font-weight:600;letter-spacing:0px;margin-top:12px;margin-bottom:4px;text-align:start;padding-left:0px;\"><b><strong style=\"color:black;white-space:pre-wrap;\">Why Join Us? </strong></b></h4><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"color:black;font-size:11pt;white-space:pre-wrap;\">At Eridu, you’ll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI infrastructure solutions, transforming the performance of AI data centers. </span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"color:black;font-size:11pt;white-space:pre-wrap;\"> </span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"color:black;font-size:11pt;white-space:pre-wrap;\">The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles. </span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:start;\"><br></p><h6 style=\"font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:13pt;font-weight:600;letter-spacing:0.25px;margin-top:8px;margin-bottom:4px;padding-left:0px;\"><b><strong style=\"white-space:pre-wrap;\">Notice to Recruiting Agencies</strong></b></h6><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Eridu does not accept unsolicited resumes or candidate profiles from staffing agencies or third-party recruiters. Any candidate submitted to Eridu without prior written authorization from our recruiting team will be considered unsolicited and will become the property of Eridu. Eridu reserves the right to pursue and hire such candidates without any obligation to pay fees. Recruiting agencies are expressly instructed not to contact hiring managers, employees, or executives regarding open positions.</span></p>",
"company": "<meta><h4 style=\"font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:18pt;font-weight:600;letter-spacing:0px;margin-top:12px;margin-bottom:4px;padding-left:0px;\"><b><strong style=\"white-space:pre-wrap;\">About Eridu</strong></b></h4><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Eridu is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate AI data centers to deliver </span><i><em style=\"font-size:11pt;white-space:pre-wrap;\">Faster AI</em></i><span style=\"font-size:11pt;white-space:pre-wrap;\">. Today’s AI performance is frequently limited by communication bottlenecks. Eridu introduces multiple industry-first innovations across silicon, packaging, software, and systems to deliver an order of magnitude improvement in performance and unlock greater GPU utilization to speed training job completion times and tokens-per-second for more profitable inference. We do this while simultaneously reducing capital and power costs and improving reliability.</span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"font-size:11pt;white-space:pre-wrap;\"> </span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">The company’s solutions and value proposition have been widely validated by leading hyperscalers.</span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"font-size:11pt;white-space:pre-wrap;\"> </span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Eridu has raised over $200M to date including its most recent, oversubscribed Series A round. The company is led by a veteran team of Silicon Valley executives who have delivered multiple billion dollar product lines and led multiple companies to billion dollar exits, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ: INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (the world’s leading micro-LED company). The company is in execution mode and has a world-class engineering team with decades of experience in state-of-the-art silicon, packaging, optics, software, and systems. Eridu is working with best-in-class supply chain partners including silicon, packaging and systems.</span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"font-size:11pt;white-space:pre-wrap;\"> </span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Visit our website </span><a href=\"http://eridu.ai\" target=\"_blank\" class=\"css-173makr-linkStyle\" style=\"color:rgb(30,74,169);cursor:pointer;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">eridu.ai</span></a><span style=\"font-size:11pt;white-space:pre-wrap;\"> to learn more.</span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11.25pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:left;\"><br></p>"
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