Principal FPGA Engineer

{
  "content_hash": "49a2bde0707750fdee3a066f7a5eea742319e0ba21b1e13b34fd1753a88bf569",
  "source_hash": "63d128ab9dc0921f4c7435e4243fae6c158939b284091af93ec4bcf770428c32",
  "last_changed_at": "2026-05-31T17:46:08.101Z",
  "active_status": "active"
}

{
  "language": "en",
  "location": {
    "raw": "Hawthorne, California, Hawthorne, CA",
    "city": "Hawthorne",
    "region": "CA",
    "country": "United States",
    "is_remote": false,
    "confidence": 0.9
  },
  "salary_max": 243000,
  "salary_min": 203000,
  "inferred_at": "2026-06-06T10:52:14.349Z",
  "launch_scope": {
    "reason": "english_us_canada",
    "included": true,
    "language": "en",
    "location": {
      "raw": "Hawthorne, California, Hawthorne, CA",
      "city": "Hawthorne",
      "region": "CA",
      "country": "United States",
      "is_remote": false,
      "confidence": 0.9
    },
    "countries": [
      "United States"
    ]
  },
  "remote_policy": null,
  "salary_period": "year",
  "workplace_type": "on_site",
  "salary_currency": "USD"
}

{}

{
  "id": "466907",
  "job": {
    "id": "476537",
    "division": null,
    "department": {
      "id": "25601",
      "name": "Avionics"
    },
    "requisition_id": "R0267",
    "structure_custom_group_one": null
  },
  "url": "https://astrolab.pinpointhq.com/en/postings/47885220-98bd-436b-af52-34d9ba3163fe",
  "path": "/en/postings/47885220-98bd-436b-af52-34d9ba3163fe",
  "title": "Principal FPGA Engineer ",
  "benefits": "<ul><li><!--block-->Join a team of best-in-class engineers building the foundation of planetary surface exploration</li><li><!--block-->Equity ownership in the company</li><li><!--block-->Comprehensive health benefits, including medical, dental, vision, and mental health support</li><li><!--block-->401(k) plan with company match</li><li><!--block-->Flexible PTO and parental leave</li><li><!--block-->Home office set up reimbursement</li><li><!--block-->Fully flexible and remote friendly work environment</li><li><!--block-->Weekly lunch stipend, plus complimentary snacks and beverages on-site</li><li><!--block-->Once a month social hour on-site with food and drinks</li></ul>",
  "location": {
    "id": "11974",
    "city": "Hawthorne",
    "name": "Hawthorne, California",
    "province": "CA",
    "postal_code": "90250"
  },
  "deadline_at": null,
  "description": "<div><!--block-->Venturi Astrolab, Inc. (Astrolab) is pioneering new ways to explore and operate on distant planetary bodies. We are singularly focused on designing, building, and operating a fleet of multi-purpose commercial planetary rovers to extend and enhance humanity’s presence in the solar system. We are seeking motivated, creative, and exceptional people to join our world-class team.&nbsp; &nbsp;&nbsp;<br><br></div><div><!--block-->The Avionics team is responsible for all aspects of the electrical systems and hardware on Astrolab’s electric rover vehicles and ground support equipment.&nbsp; We work collaborative with all teams at Astrolab to provide exceptionally capable and reliable electronics to serve our missions.&nbsp; &nbsp;<br><br></div><div><!--block-->The Principal FPGA Engineer will participate in all aspects of the development and test of avionics FPGA RTL designs for Astrolab rovers. The ideal candidate has 15+ years of experience in FPGA firmware development including RTL design, simulations, analysis, verification, and HW testing.&nbsp;<br><br></div><div><!--block-->This position will report to the Director of Avionics Engineering and will be based in our Hawthorne, CA office.&nbsp;</div><div><!--block--><br></div>",
  "compensation": "$203,000 - $243,000 / year",
  "reporting_to": "Jake Peery",
  "workplace_type": "onsite",
  "benefits_header": "What We Offer: ",
  "employment_type": "full_time",
  "workplace_type_text": "Onsite",
  "compensation_maximum": 243000,
  "compensation_minimum": 203000,
  "compensation_visible": true,
  "employment_type_text": "Full Time",
  "key_responsibilities": "<ul><li><!--block-->Own FPGA RTL development from blank sheet to flight</li><li><!--block-->Develop FPGA logical architecture and requirements in collaboration with other engineering disciplines including defining HW/SW interfaces between fabric logic and processing subsystems</li><li><!--block-->Develop RTL code for Microsemi, Xilinx, or other FPGA or SoC devices in either SystemVerilog or VHDL</li><li><!--block-->Perform design verification including simulations, test benches, timing analysis, and hardware testing</li><li><!--block-->Lead design reviews, demonstrate requirement traceability, and create documentation for FPGA operation and interfacing with other SW and FPGA systems</li><li><!--block-->Develop and participate in test campaigns ranging from unit level manual tests, unit automated tests, and system level tests</li></ul>",
  "compensation_currency": "USD",
  "compensation_frequency": "year",
  "skills_knowledge_expertise": "<ul><li><!--block-->Bachelor of Science degree in Computer Engineering, Electrical Engineering, or equivalent</li><li><!--block-->15+ years of experience in FPGA RTL architecture, development, verification, deployment, and maintenance</li><li><!--block-->Skilled at SystemVerilog or VHDL</li><li><!--block-->Skilled in at least 1 scripting language (TCL, shell, Python, etc)&nbsp;</li><li><!--block-->Skilled in verification techniques, and timing/stability analysis</li><li><!--block-->Proficiency in understanding PCB designs and reading schematics</li><li><!--block-->Proficiency in understanding embedded software</li><li><!--block-->Proficiency with AXI protocols (at least AXI4 family)</li><li><!--block-->Knowledge of common bus and memory interfaces (DDR4, SPI, I2C, UART, etc)</li><li><!--block-->Demonstrated success working in a dynamic environment</li></ul><div><!--block--><strong>Additional Responsibilities</strong>&nbsp;</div><ul><li><!--block-->Design for space environments including radiation impacts and mitigations</li></ul>",
  "key_responsibilities_header": "What you'll do:",
  "skills_knowledge_expertise_header": "What You'll Bring "
}