Signal Integrity Engineer

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    "datePosted": "2026-04-28",
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    "description": "<p>Cornelis Networks delivers the world’s highest performance scale-out networking solutions for AI and HPC datacenters. Our differentiated architecture seamlessly integrates hardware, software and system level technologies to maximize the efficiency of GPU, CPU and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI &amp; HPC workloads, empowering our customers to push the boundaries of innovation. Backed by top-tier venture capital and strategic investors, we are committed to innovation, performance and scalability - solving the world’s most demanding computational challenges with our next-generation networking solutions. </p>\n<p> </p>\n<p>We are a fast-growing, forward-thinking team of architects, engineers, and business professionals with a proven track record of building successful products and companies. As a global organization, our team spans multiple U.S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles. </p>\n<p><br></p>\n<p>Cornelis Networks is hiring a talented Signal Integrity (SI) Engineer with some experience in system and printed circuit board (PCB) development and design. The SI engineer will be involved in the high-speed interface design, from conception through end-of-life, of the next generation Cornelis Networks Fabric platforms.  </p>\n<p><br></p>\n<p><span style=\"font-weight: bold\">Key Responsibilities:</span></p>\n<ul>\n<li>Perform SI simulation including modeling, pre/post-data processing and analysis</li>\n</ul>\n<ul>\n<li>Support high-speed interface interconnects/channel simulation and analysis</li>\n<li>Work in lab with various equipment to perform SI measurements, SerDes test, cable evaluation and qualification, and correlation of the measurements with the SI simulations</li>\n</ul>\n<ul>\n<li>Provide design guidelines for platforms based on simulation and 3D modeling activities</li>\n<li>Review platform designs to ensure that signal paths are laid out to meet design specifications for high-speed interfaces such as PCIe and Ethernet.</li>\n<li>Work with platform mechanical, electrical design, software, system test, and manufacturing teams to assist in moving the product into production</li>\n</ul>\n<p><br><span style=\"font-weight: bold\">Minimum qualifications:<br></span></p>\n<ul>\n<li>3+ years of experience in the usage of electromagnetic (EM) simulation tools</li>\n<li>BS or MS in Electrical Engineering, Computer Engineering or Electrical and Computer Engineering</li>\n<li>Understand transmission line theory and electromagnetic (EM) field concepts such as S-parameter and impedance match</li>\n<li>Knowledge of SI fundamentals in modeling complex structures such as packages, BGA, connectors, and PCB boards</li>\n<li>Scripting languages such as Matlab and Python</li>\n<li>Develop technical documents, including design guidelines and simulation/test correlation reports</li>\n<li>Strong communication and interpersonal skills</li>\n</ul>\n<p><br><span style=\"font-weight: bold\">Preferred qualifications:</span></p>\n<ul>\n<li>2D/3D EM field solver tools, such as Ansys HFSS, CST, Sigrity, or Keysight SI/PI/EM Pro</li>\n<li>Channel simulation tools for frequency domain and time domain analysis such as Keysight ADS</li>\n<li>High-speed interface design and analysis concepts, such as PCIe, Ethernet IEEE802.3, etc.</li>\n<li>Hand-on experience for lab equipment such as Oscilloscope, Vector Network Analyzer (VNA), Bit Error Rate Tester (BERT), Time Domain Reflectometry (TDR), etc.</li>\n<li>The concepts of PCB layout, which may include experience with tools such as Candence Allegro PCB designer or other PCB designer tools</li>\n<li>Strong problem-solving and analytical skills to diagnose and resolve SI/PI failures</li>\n<li>Knowledge of optical and active copper cable technologies is a plus</li>\n</ul>\n<p><br></p>\n<p><span style=\"font-weight: bold\">Location</span>: This position follows a hybrid work model and is based at the Chesterbrook Corporate Center in Wayne, PA. The ideal candidate will reside within a reasonable commuting distance.<br></p>\n<p><br></p>\n<p>We offer a competitive compensation package that includes equity, cash, and incentives, along with health and retirement benefits. Our dynamic, flexible work environment provides the opportunity to collaborate with some of the most influential names in the semiconductor industry. </p>\n<p><br></p>\n<p>At Cornelis Networks your base salary is only one component of your comprehensive total rewards package. Your base pay will be determined by factors such as your skills, qualifications, experience, and location relative to the hiring range for the position. Depending on your role, you may also be eligible for performance-based incentives, including an annual bonus or sales incentives.</p>\n<p><br></p>\n<p>In addition to your base pay, you’ll have access to a broad range of benefits, including medical, dental, and vision coverage, as well as disability and life insurance, a dependent care flexible spending account, accidental injury insurance, and pet insurance. We also offer generous paid holidays, 401(k) with company match, and Open Time Off (OTO) for regular full-time exempt employees. Other paid time off benefits include sick time, bonding leave, and pregnancy disability leave.</p>\n<p><br></p>\n<p>Cornelis Networks does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. Cornelis Networks is an equal opportunity employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.<br></p>",
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