Digital Design Engineers - 7 openings

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    "description": "<p>At <span style=\"font-weight: bold\">Kandou</span>, we are redefining the economics of AI infrastructure. Our mission is to <span style=\"font-weight: bold\">democratise AI by significantly reducing the Total Cost of Ownership (TCO) </span>of hardware systems - a critical barrier to scalable adoption.</p>\n<p><br></p>\n<p>Our proprietary <span style=\"font-weight: bold\">MIMO-over-copper technology </span>powers a <span style=\"font-weight: bold\">high-performance, Chiplet-based AI memory fabric </span>that is both <span style=\"font-weight: bold\">scalable and energy-efficient</span>. Unlike traditional interconnects, our solution <span style=\"font-weight: bold\">reduces power consumption significantly </span>while preserving <span style=\"font-weight: bold\">high bandwidth and ultra-low latency -</span> unlocking unprecedented efficiency for AI training and inference at scale.</p>\n<p><br></p>\n<p>Kandou’s architecture is not just an incremental improvement - it’s a <span style=\"font-weight: bold\">foundational </span><span style=\"font-weight: bold\">shift </span>in how AI hardware is built for the future.</p>\n<p><br></p>\n<p><span style=\"font-size: 12pt\"><span style=\"font-weight: bold\">Location: Hyderabad OR Bangalore</span></span></p>\n<p><span style=\"font-size: 12pt\"><span style=\"font-weight: bold\">Department: </span>Semiconductor Design Engineering</span></p>\n<p><span style=\"font-size: 12pt\"><span style=\"font-weight: bold\">Experience Level: </span>5–10 Years</span></p>\n<p><span style=\"font-size: 12pt\"><span style=\"font-weight: bold\">Employment Type: </span>Full-Time</span></p>\n<p><br></p>\n<p><span style=\"font-size: 12pt; font-weight: bold\">About the Role:</span></p>\n<p><span style=\"font-size: 12pt\">We are seeking for <span style=\"font-weight: bold\">talented Mid-Level Digital Design Engineers</span> to contribute to the development of high-performance digital circuits for next-generation communication and memory interfaces. The ideal candidate will have strong experience in high-speed digital design, semiconductor development flows, and cross-functional collaboration with verification and analog/mixed-signal teams.</span></p>\n<p><br><br></p>\n<p><span style=\"font-size: 12pt; font-weight: bold\">Key Responsibilities:</span></p>\n<ul>\n<li><span style=\"font-size: 12pt\">Define digital architecture concepts and specify analog-to-digital interfaces.</span></li>\n<li><span style=\"font-size: 12pt\">Develop RTL for high-speed digital blocks and contribute to IP verification and basic DFT implementation.</span></li>\n<li><span style=\"font-size: 12pt\">Perform logic synthesis and support timing analysis activities.</span></li>\n<li><span style=\"font-size: 12pt\">Design and verify high-performance digital circuits meeting area, timing, and power requirements.</span></li>\n<li><span style=\"font-size: 12pt\">Develop block-level specifications based on system-level requirements.</span></li>\n<li><span style=\"font-size: 12pt\">Collaborate closely with verification, physical implementation, and analog/mixed-signal engineering teams.</span></li>\n<li><span style=\"font-size: 12pt\">Analyse and implement high-speed serial protocols (e.g., USB4, PCIe).</span></li>\n<li><span style=\"font-size: 12pt\">Support post-silicon bring-up, debugging, characterization, and productization.</span></li>\n<li><span style=\"font-size: 12pt\">Validate and test silicon in laboratory environments.</span></li>\n</ul>\n<p><br><br></p>\n<p><span style=\"font-size: 12pt; font-weight: bold\">Required Qualifications:</span></p>\n<ul>\n<li><span style=\"font-size: 12pt\">B.E/B.Tech./B.S/M.E/M.Tech/M.S in Electrical Engineering, Electronics, Communications, VLSI, Microelectronics or related field.</span></li>\n<li><span style=\"font-size: 12pt\">5–10 years of semiconductor industry experience in digital design.</span></li>\n<li><span style=\"font-size: 12pt\">Proven experience in high-speed digital circuit design using deep-submicron CMOS technologies.</span></li>\n<li><span style=\"font-size: 12pt\">Experience designing digital circuits for multi-gigabit serial data-link transceivers, DDR, or high-performance memory interfaces.</span></li>\n<li><span style=\"font-size: 12pt\">Experience with industry-standard EDA tools for design, simulation, and verification.</span></li>\n<li><span style=\"font-size: 12pt\">Strong background in complex digital system design and verification.</span></li>\n</ul>\n<p><br><br></p>\n<p><span style=\"font-size: 12pt; font-weight: bold\">Preferred Qualifications:</span></p>\n<ul>\n<li><span style=\"font-size: 12pt\">Experience with Industry Standard design tools.</span></li>\n<li><span style=\"font-size: 12pt\">Experience with multi-gigabit serial data transceivers.</span></li>\n<li><span style=\"font-size: 12pt\">Exposure to analog/digital control interfaces.</span></li>\n<li><span style=\"font-size: 12pt\">Knowledge of synthesis, static timing analysis (STA), and signal processing techniques.</span></li>\n<li><span style=\"font-size: 12pt\">Familiarity with verification methodologies and tools.</span></li>\n</ul>\n<p><br><br></p>\n<p><span style=\"font-size: 12pt; font-weight: bold\">Technical Skills:</span></p>\n<ul>\n<li><span style=\"font-size: 12pt\">RTL design expertise including CDC analysis and linting.</span></li>\n<li><span style=\"font-size: 12pt\">Strong scripting and automation skills (Python preferred).</span></li>\n<li><span style=\"font-size: 12pt\">Solid understanding of high-speed, low-power digital design techniques.</span></li>\n<li><span style=\"font-size: 12pt\">Ability to translate system-level requirements into detailed digital implementations.</span></li>\n<li><span style=\"font-size: 12pt\">Strong analytical, problem-solving, and debugging skills.</span></li>\n<li><span style=\"font-size: 12pt\">Effective communication and collaboration abilities.</span><br></li>\n</ul>\n<p><br><br></p>\n<p><span style=\"font-family: arial, helvetica, sans-serif\"><span><span style=\"font-family: Inter, sans-serif; font-size: 12pt\"><span style=\"color: rgb(34, 34, 34)\">Visit us at </span><a href=\"https://www.kandou.ai/\" target=\"_blank\" rel=\"noopener noreferrer\">www.kandou.ai</a><span style=\"color: rgb(34, 34, 34)\"> and </span></span><a href=\"https://www.linkedin.com/company/kandou-ai/posts?lipi=urn%3Ali%3Apage%3Acompanies_company_index%3Bd9883c75-e180-4084-9488-1a503e730cfe\" target=\"_blank\" rel=\"noopener noreferrer\"><span style=\"font-family: Inter, sans-serif; font-size: 12pt\">https://www.linkedin.com/company/kandou-ai/</span></a></span></span></p>",
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