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FPGA Engineer

D0f6f3fc E22e 48cc 8d92 107e52c30ed5 19000101 000001 · Phoenix, AZ, US, Phoenix, AZ; Grand Rapids, MI, US, Grand Rapids, MI · Active · ADP Workforce Now Recruiting

Job facts

FieldValue
CompanyD0f6f3fc E22e 48cc 8d92 107e52c30ed5 19000101 000001
TitleFPGA Engineer
Normalized title-
Department / team-
LocationPhoenix, AZ, United States
Work model-
Employment typeFull Time
Salary-
Statusactive
ATS providerADP Workforce Now Recruiting
Posted / first seen2026-04-02 / 2026-05-31
Changed / last seen2026-06-06 / 2026-06-06

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CompanyD0f6f3fc E22e 48cc 8d92 107e52c30ed5 19000101 000001
Source9cade15c-36bd-40bf-b7a4-96921e0ee6d8
ATS providerADP Workforce Now Recruiting

Description

About Acron Aviation (Avionics): Acron Aviation designs, engineers, and manufactures certified avionics systems that support safety‑critical flight operations across commercial and military aviation. Our avionics portfolio includes surveillance, recorders, displays, and related systems developed in regulated environments and deployed on aircraft worldwide. We partner closely with operators and OEMs to deliver reliable, certifiable technology throughout the full product lifecycle—from development and qualification through production and aftermarket support. At Acron Aviation, avionics engineering is rooted in technical rigor, operational discipline, and a customer‑first approach to execution. About our Surveillance Product Line: Acron Aviation’s Surveillance organization develops and sustains safety‑critical systems that enable aircraft awareness, collision avoidance, and airspace interoperability. Our surveillance portfolio includes ADS‑B, Mode S transponders, traffic collision avoidance, and integrated surveillance solutions deployed across commercial, military, and rotorcraft platforms. This work is performed in highly regulated environments. It requires deep expertise in systems, hardware, software, and RF across the full lifecycle—from requirements and certification through production and in‑service support. Surveillance engineering at Acron Aviation emphasizes technical rigor, disciplined execution, and close coordination with operators and OEM partners. Job Description: We are seeking an early- to mid-career FPGA/Firmware Engineer to join our surveillance hardware product development team. In this role, you will be responsible for designing, developing, verifying, and maintaining safety-critical firmware for avionics and embedded systems for TCAS and transponder applications in compliance with DO-254 standards. You will work closely with hardware engineers, system architects, and certification authorities to ensure robust design assurance processes are followed throughout the product lifecycle. Ideal candidates will have a deep understanding of FPGA/ASIC development, VHDL/Verilog, and requirements-based verification, with experience developing firmware for FAA/EASA-certified aerospace systems. You will be involved with multidisciplinary project teams comprising mechanical, electrical, digital/analog, RF, firmware, and software engineers in planning, designing, prototyping, and testing of avionics systems. Design focus will include surveillance avionics for Air Transport, General Aviation, and emerging platforms such as Urban Air Mobility (UAM) eVTOL aircraft. Essential Functions: · Experience with Xilinx and Microchip FPGAs along with associated tools (ISE, Vivado, Libero) · Experience with simulation tools (Active HDL/QuestaSim) · Must be knowledgeable in VHDL and/or Verilog RTL coding · Knowledge of DO-254 Airborne Electronic Hardware development lifecycle · Experience with requirements-based verification · Generate design documents including HRDs, HDDs, and HCIAs. Generate certification documents such as PHACs. · Effectively communicate across multiple technical teams. · Communicate directly with customers, in person or virtually, to understand their problems and formulate actionable solutions. · Other duties as assigned. · Travel up to 10%. Qualifications: · Bachelor’s Degree in Electrical Engineering or Computer Engineering and minimum 6 years of prior relevant experience. Graduate Degree and a minimum of 5 years of prior related experience. · Minimum 3 years of prior relevant experience in an engineering discipline with systems engineering principles, including requirements definition, requirements verification, design reviews and documentation, integration, test, and demonstration. · Minimum 3 years’ experience with FPGA and firmware design. · Hands-on experience designing and developing avionics products, RF, or sensor systems. Preferred Additional Skills: · Experience with and an understanding of aerospace systems, especially in the development of integrated hardware/software products · Exposure to Model-Based Systems Engineering · Awareness of electrical development requirements as they impact firmware and FPGA design · Experience with RTOS integration and understanding of its implications on hardware design · Practical understanding of the complexities of RF design, especially in the L-band frequency range, and application of RF FPGA principles · Excellent people skills, with experience leading and collaborating in a multi-disciplinary, diverse, and dynamic team environment. · Excellent communication skills (written, verbal, & presentation) · Knowledge of DO-160 and DO-178 · Experience with Design to Cost and Design for Manufacturability · Experience effectively supporting the production and testing of products in a different geographic location · Demonstrated ability to handle multiple programs and responsibilities simultaneously · Ability to operate and identify an appropriate path forward with minimal oversight · Pilot License or Part 107 certificate Acron Aviation is proud to be an Affirmative Action/Equal Opportunity Employer. Acron Aviation is committed to treating all employees and applicants for employment with respect and dignity and to maintaining a workplace free from unlawful discrimination. All applicants will be considered for employment without regard to race, color, religion, age, national origin, ancestry, ethnicity, gender (including pregnancy, childbirth, breastfeeding or other related medical conditions), gender identity, gender expression, sexual orientation, marital status, veteran status, disability, genetic information, citizenship status, characteristic or membership in any other group protected by federal, state or local laws. Acron Aviation maintains a drug-free workplace and performs pre-employment substance abuse testing and background checks, where permitted by law. Acron Aviation is an E-Verify Employer.

Full job record

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First Seen At2026-05-31 18:46:06Z
Last Seen At2026-06-06 12:03:09Z
Last Checked At2026-06-06 12:03:09Z
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    "requisitionDescription": "<div><div><div><p data-pasted=\"true\"><span style=\"font-family: arial, sans-serif; font-size: 16px;\"><strong>About Acron Aviation (Avionics):</strong></span></p><p><span style=\"font-family: arial, sans-serif; font-size: 16px;\">Acron Aviation designs, engineers, and manufactures certified avionics systems that support safety‑critical flight operations across commercial and military aviation. Our avionics portfolio includes surveillance, recorders, displays, and related systems developed in regulated environments and deployed on aircraft worldwide. We partner closely with operators and OEMs to deliver reliable, certifiable technology throughout the full product lifecycle&mdash;from development and qualification through production and aftermarket support. At Acron Aviation, avionics engineering is rooted in technical rigor, operational discipline, and a customer‑first approach to execution.</span></p><p><span style=\"font-family: arial, sans-serif; font-size: 16px;\"><strong>About our Surveillance Product Line:</strong></span></p><p><span style=\"font-family: arial, sans-serif; font-size: 16px;\">Acron Aviation&rsquo;s Surveillance organization develops and sustains safety‑critical systems that enable aircraft awareness, collision avoidance, and airspace interoperability. Our surveillance portfolio includes ADS‑B, Mode S transponders, traffic collision avoidance, and integrated surveillance solutions deployed across commercial, military, and rotorcraft platforms. This work is performed in highly regulated environments. It requires deep expertise in systems, hardware, software, and RF across the full lifecycle&mdash;from requirements and certification through production and in‑service support. Surveillance engineering at Acron Aviation emphasizes technical rigor, disciplined execution, and close coordination with operators and OEM partners.</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;' data-pasted=\"true\"><span style=\"font-family: arial, sans-serif; font-size: 16px;\"><strong>Job Description:</strong></span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">We are seeking an early- to mid-career FPGA/Firmware Engineer to join our surveillance hardware product development team. In this role, you will be responsible for designing, developing, verifying, and maintaining safety-critical firmware for avionics and embedded systems for TCAS and transponder applications in compliance with DO-254 standards. You will work closely with hardware engineers, system architects, and certification authorities to ensure robust design assurance processes are followed throughout the product lifecycle. Ideal candidates will have a deep understanding of FPGA/ASIC development, VHDL/Verilog, and requirements-based verification, with experience developing firmware for FAA/EASA-certified aerospace systems.</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">You will be involved with multidisciplinary project teams comprising mechanical, electrical, digital/analog, RF, firmware, and software engineers in planning, designing, prototyping, and testing of avionics systems. Design focus will include surveillance avionics for Air Transport, General Aviation, and emerging platforms such as Urban Air Mobility (UAM) eVTOL aircraft.</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\"><strong>Essential Functions:</strong></span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Experience with Xilinx and Microchip FPGAs along with associated tools (ISE, Vivado, Libero)</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Experience with simulation tools (Active HDL/QuestaSim)</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Must be knowledgeable in VHDL and/or Verilog RTL coding</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Knowledge of DO-254 Airborne Electronic Hardware development lifecycle</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Experience with requirements-based verification</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Generate design documents including HRDs, HDDs, and HCIAs. Generate certification documents such as PHACs.</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Effectively communicate across multiple technical teams.</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Communicate directly with customers, in person or virtually, to understand their problems and formulate actionable solutions.</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Other duties as assigned.</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Travel up to 10%.</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\"><strong>Qualifications:</strong></span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Bachelor&rsquo;s Degree in Electrical Engineering or Computer Engineering and minimum 6 years of prior relevant experience. Graduate Degree and a minimum of 5 years of prior related experience.</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Minimum 3 years of prior relevant experience in an engineering discipline with systems engineering principles, including requirements definition, requirements verification, design reviews and documentation, integration, test, and demonstration.</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Minimum 3 years&rsquo; experience with FPGA and firmware design.</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Hands-on experience designing and developing avionics products, RF, or sensor systems.</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\"><strong>Preferred Additional Skills:</strong></span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Experience with and an understanding of aerospace systems, especially in the development of integrated hardware/software products</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Exposure to Model-Based Systems Engineering</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Awareness of electrical development requirements as they impact firmware and FPGA design</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Experience with RTOS integration and understanding of its implications on hardware design</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Practical understanding of the complexities of RF design, especially in the L-band frequency range, and application of RF FPGA principles</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Excellent people skills, with experience leading and collaborating in a multi-disciplinary, diverse, and dynamic team environment.</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Excellent communication skills (written, verbal, &amp; presentation)</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Knowledge of DO-160 and DO-178</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Experience with Design to Cost and Design for Manufacturability</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Experience effectively supporting the production and testing of products in a different geographic location</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Demonstrated ability to handle multiple programs and responsibilities simultaneously</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Ability to operate and identify an appropriate path forward with minimal oversight</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\">&middot; Pilot License or Part 107 certificate</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 16px;\"><br></span></p><p data-pasted=\"true\"><span style=\"font-family: arial, sans-serif; font-size: 16px;\">Acron Aviation is proud to be an Affirmative Action/Equal Opportunity Employer. Acron Aviation is committed to treating all employees and applicants for employment with respect and dignity and to maintaining a workplace free from unlawful discrimination. All applicants will be considered for employment without regard to race, color, religion, age, national origin, ancestry, ethnicity, gender (including pregnancy, childbirth, breastfeeding or other related medical conditions), gender identity, gender expression, sexual orientation, marital status, veteran status, disability, genetic information, citizenship status, characteristic or membership in any other group protected by federal, state or local laws.</span></p><p><span style=\"font-family: arial, sans-serif; font-size: 16px;\">Acron Aviation maintains a drug-free workplace and performs pre-employment substance abuse testing and background checks, where permitted by law.</span></p><p><span style=\"font-family: arial, sans-serif; font-size: 16px;\">Acron Aviation is an E-Verify Employer.</span></p></div></div></div>\n",
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GET https://api.bluedoor.sh/job-postings/v1/orgs/8b8487ad-58c7-4e27-bd23-e5281163c3d4JSON
GET https://api.bluedoor.sh/job-postings/v1/sources/9cade15c-36bd-40bf-b7a4-96921e0ee6d8JSON
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