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Senior Principal Analog Design Engineer – Power & Clock IP events
Lifecycle events for this job posting: created, updated, closed, and reopened. Showing 2 events on this page from 2 matching events.
| Event | Role | Field | Date |
|---|---|---|---|
| job.closed | active_status | active_status | 2026-06-03 |
| job.created | Senior Principal Analog Design Engineer – Power & Clock IP | - | 2026-05-31 |
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