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      "role": "<meta><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">About the role</strong></b></p><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:12pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"color:rgb(32,32,34);background-color:rgb(255,255,255);font-size:12pt;white-space:pre-wrap;\">We are seeking a skilled and detail-oriented Eagle Test Technician to perform wafer-level testing using Eagle Test Systems (ETS) automated test platforms. This role supports high-volume production and engineering evaluations, ensuring electrical integrity and yield optimization for ultra-compact packaged devices.</span></p><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">What you'll do</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"color:rgb(32,32,34);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"color:rgb(32,32,34);white-space:pre-wrap;\">Operate Eagle Test Systems (ETS) for wafer-level electrical testing of devices across analog, mixed-signal, and digital domains.</span></li><li style=\"color:rgb(32,32,34);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"color:rgb(32,32,34);white-space:pre-wrap;\">Set up and calibrate wafer probers with specific probe cards, ensuring proper alignment and contact quality.</span></li><li style=\"color:rgb(32,32,34);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"color:rgb(32,32,34);white-space:pre-wrap;\">Execute and monitor test programs, flagging anomalies and supporting root cause analysis for yield excursions.</span></li><li style=\"color:rgb(32,32,34);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"color:rgb(32,32,34);white-space:pre-wrap;\">Perform preventative maintenance on ETS hardware, probe stations, and test interfaces to ensure uptime and accuracy.</span></li><li style=\"color:rgb(32,32,34);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"color:rgb(32,32,34);white-space:pre-wrap;\">Collaborate with test and product engineers to validate test coverage, debug failures, and optimize test flows for form factors.</span></li><li style=\"color:rgb(32,32,34);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"color:rgb(32,32,34);white-space:pre-wrap;\">&nbsp;Document test results, equipment status, and lot disposition in MES/SPC systems.</span></li><li style=\"color:rgb(32,32,34);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"color:rgb(32,32,34);white-space:pre-wrap;\">Support engineering lots, qualification runs, and test program revisions for new designs.</span></li></ul><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">Qualifications</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"color:rgb(32,32,34);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"color:rgb(32,32,34);white-space:pre-wrap;\">Associate’s degree or technical certification in electronics, semiconductor technology, or related field.</span></li><li style=\"color:rgb(32,32,34);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"color:rgb(32,32,34);white-space:pre-wrap;\">2+ years of hands-on experience with Eagle Test Systems or equivalent ATE platforms.</span></li><li style=\"color:rgb(32,32,34);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"color:rgb(32,32,34);white-space:pre-wrap;\">Ability to interpret schematics, debug test setups, and analyze electrical measurements.</span></li><li style=\"color:rgb(32,32,34);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"color:rgb(32,32,34);white-space:pre-wrap;\">Proficiency with basic software tools (Excel, MES, SPC, test data viewers).</span></li><li style=\"color:rgb(32,32,34);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"color:rgb(32,32,34);white-space:pre-wrap;\">Experience with Cadence, Teradyne, or Advantest platforms.</span></li><li style=\"color:rgb(32,32,34);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"color:rgb(32,32,34);white-space:pre-wrap;\">Knowledge of low-pin-count testing, leakage, shorts, and parametric analysis for devices.</span></li><li style=\"color:rgb(32,32,34);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"color:rgb(32,32,34);white-space:pre-wrap;\">Understanding of package-level reliability risks (e.g., solder ball integrity, pad stress) and how they relate to test results.</span></li><li style=\"color:rgb(32,32,34);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"color:rgb(32,32,34);white-space:pre-wrap;\">Strong troubleshooting skills and ability to work independently in a fast-paced fab or OSAT environment.</span></li><li style=\"color:rgb(32,32,34);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"color:rgb(32,32,34);white-space:pre-wrap;\">Test floor setting with strict ESD and safety protocols.</span></li></ul>",
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