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NPU Architect
Semron · Dresden, DE (primary site) · Active · Personio
Job facts
| Field | Value |
|---|---|
| Company | Semron |
| Title | NPU Architect |
| Normalized title | - |
| Department / team | Chip Design |
| Location | Dresden, DE, United States |
| Work model | - |
| Employment type | Full Time |
| Salary | - |
| Status | active |
| ATS provider | Personio |
| Posted / first seen | 2025-10-14 / 2026-05-30 |
| Changed / last seen | 2026-05-30 / 2026-06-06 |
Related slices
| Page | What it contains | Open |
|---|---|---|
| Company jobs | Active postings from Semron. | Open |
| Company breakdowns | Role, location, ATS, and work model facets for this company. | Open |
| ATS provider jobs | Active postings observed through Personio. | Open |
| Provider filtered search | The same provider as a filtered job collection. | Open |
| City jobs | Active postings in Dresden. | Open |
| Department jobs | Active postings in Chip Design. | Open |
| Lifecycle events | Open, update, close, and reopen events for this posting. | Open |
| Original posting | Canonical source or apply URL captured from the ATS. | Open |
Linked records
| Company | Semron |
| Source | 61abef5e-84a2-4f60-bcf4-a6a1bcf5067b |
| ATS provider | Personio |
Description
About the Role
In this role you'll be responsible to design the next iteration of SEMRON's 3D in-memory compute chip. You will collaborate with a team of hardware, compiler and ML engineers to optimise all aspects of executing ML workloads based on our capacitive analog in-memory matrix-vector multiplication units.
What you will do:
Design and specify the structure and internal organisation of core architecture modules, aligned with workload requirements and software deployment processes. Partner with the software team to evaluate module performance and efficiency for key workloads, uncover performance constraints, and inform architectural choices. Monitor emerging trends and research in AI workloads, hardware architectures, and applications to guide the evolution of next-generation architectures.
What you should bring in:
BS/MS/PhD in EE, CS, or a related field Understanding in computer architecture, digital design, and micro-architecture concepts Familiarity with AI/ML algorithms, frameworks, and workloads Programming experience in C/C++ and Python
Helpful but not required:
Hands-On Experience with ML Hardware Exploration Frameworks like Timeloop, ZigZag, etc. Hands-On Experience with HDLs such as Verilog or System Verilog
Full job record
| Job ID | 5e074683a418e8d7aed829d9cbed895e1583e8ff |
| Org ID | 7e9eecd8-ff97-4f83-942a-78c8c866a2d7 |
| Source ID | 61abef5e-84a2-4f60-bcf4-a6a1bcf5067b |
| Board ID | 61abef5e-84a2-4f60-bcf4-a6a1bcf5067b |
| Provider | personio |
| Provider Job Key | 2385356 |
| Title | NPU Architect |
| Normalized Title | — |
| Status | active |
| Active | yes |
| Location Text | Dresden, DE (primary site) |
| Department | Chip Design |
| Team | — |
| Employment Type | full_time |
| Workplace Type | — |
| Remote Policy | — |
| Country | United States |
| Region | DE |
| City | Dresden |
| Salary Raw | — |
| Salary Min | — |
| Salary Max | — |
| Salary Currency | — |
| Salary Period | — |
| Source URL | https://semron.jobs.personio.de/job/2385356?language=en |
| Apply URL | https://semron.jobs.personio.de/job/2385356?language=en |
| First Seen At | 2026-05-30 05:50:36Z |
| Last Seen At | 2026-06-06 07:50:23Z |
| Last Checked At | 2026-06-06 07:50:23Z |
| Last Changed At | 2026-05-30 05:50:36Z |
| Inactive At | — |
| Source Posted At | 2025-10-14 13:49:51Z |
| Source Updated At | — |
| Raw Payload Uri | s3://job-postings-prod-raw-590183727216/raw/provider=personio/board=semron.de/date=2026-06-06/2026-06-06T07-50-22-903Z-ad3463ea873af339a56a00ff3514e5c4cf777237e1cfbc9b012744786f17b539.json |
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