Staff FPGA Engineer

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  "last_changed_at": "2026-05-31T17:46:08.101Z",
  "active_status": "active"
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{
  "language": "en",
  "location": {
    "raw": "Hawthorne, California, Hawthorne, CA",
    "city": "Hawthorne",
    "region": "CA",
    "country": "United States",
    "is_remote": false,
    "confidence": 0.9
  },
  "salary_max": 226000,
  "salary_min": 170000,
  "inferred_at": "2026-06-06T10:52:14.349Z",
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    "language": "en",
    "location": {
      "raw": "Hawthorne, California, Hawthorne, CA",
      "city": "Hawthorne",
      "region": "CA",
      "country": "United States",
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    "countries": [
      "United States"
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  "remote_policy": null,
  "salary_period": "year",
  "workplace_type": "on_site",
  "salary_currency": "USD"
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{
  "id": "466908",
  "job": {
    "id": "476538",
    "division": null,
    "department": {
      "id": "25601",
      "name": "Avionics"
    },
    "requisition_id": "R0268",
    "structure_custom_group_one": null
  },
  "url": "https://astrolab.pinpointhq.com/en/postings/2188f44d-b285-41e9-b541-b452bb3d54ef",
  "path": "/en/postings/2188f44d-b285-41e9-b541-b452bb3d54ef",
  "title": "Staff FPGA Engineer",
  "benefits": "<ul><li><!--block-->Join a team of best-in-class engineers building the foundation of planetary surface exploration</li><li><!--block-->Equity ownership in the company</li><li><!--block-->Comprehensive health benefits, including medical, dental, vision, and mental health support</li><li><!--block-->401(k) plan with company match</li><li><!--block-->Flexible PTO and parental leave</li><li><!--block-->Home office set up reimbursement</li><li><!--block-->Fully flexible and remote friendly work environment</li><li><!--block-->Weekly lunch stipend, plus complimentary snacks and beverages on-site</li><li><!--block-->Once a month social hour on-site with food and drinks</li></ul>",
  "location": {
    "id": "11974",
    "city": "Hawthorne",
    "name": "Hawthorne, California",
    "province": "CA",
    "postal_code": "90250"
  },
  "deadline_at": null,
  "description": "<div><!--block-->Venturi Astrolab, Inc. (Astrolab) is pioneering new ways to explore and operate on distant planetary bodies. We are focused on designing, building, and operating a fleet of multi-purpose commercial planetary rovers to extend and enhance humanity’s presence in the solar system. We are seeking motivated, creative, and exceptional people to join our team.&nbsp;<br><br></div><div><!--block-->The Avionics team is responsible for all aspects of the electrical systems and hardware on Astrolab’s electric rover vehicles and ground support equipment. We work collaboratively across engineering disciplines to deliver reliable, high-performance electronics that directly support flight and mission operations.&nbsp;<br><br></div><div><!--block-->The Staff FPGA Engineer will lead the architecture, development, and verification of avionics FPGA RTL designs for Astrolab rovers. This role owns FPGA design from initial concept and requirements definition through verification, integration, and flight readiness. The ideal candidate has 10+ years of experience in FPGA development including RTL design, simulation, analysis, verification, and hardware testing in complex, high reliability systems.&nbsp;<br><br></div><div><!--block-->This position will report to the Director of Avionics Engineering and will be based in our Hawthorne, CA office.&nbsp;</div>",
  "compensation": "$170,000 - $226,000 / year",
  "reporting_to": "Jake Peery",
  "workplace_type": "onsite",
  "benefits_header": "What We Offer: ",
  "employment_type": "full_time",
  "workplace_type_text": "Onsite",
  "compensation_maximum": 226000,
  "compensation_minimum": 170000,
  "compensation_visible": true,
  "employment_type_text": "Full Time",
  "key_responsibilities": "<ul><li><!--block-->Own FPGA RTL development from clean sheet architecture through qualification and flight&nbsp;</li><li><!--block-->Define FPGA logical architecture and requirements in collaboration with cross-functional engineering teams, including HW and embedded software interfaces&nbsp;</li><li><!--block-->Develop FPGA RTL for Microsemi, Xilinx, or similar devices using SystemVerilog or VHDL&nbsp;</li><li><!--block-->Perform comprehensive design verification, including simulations, test benches, timing closure, resource analysis, and hardware validation&nbsp;</li><li><!--block-->Lead design reviews, ensure requirement traceability, and create clear documentation for FPGA operation and integration with other software and FPGA systems&nbsp;</li><li><!--block-->Develop and execute test campaigns ranging from unit-level validation to system-level integration and testing&nbsp;</li><li><!--block-->Support integration, bring up, and troubleshooting during system-level and flight test activities&nbsp;</li></ul>",
  "compensation_currency": "USD",
  "compensation_frequency": "year",
  "skills_knowledge_expertise": "<ul><li><!--block-->Bachelor of Science degree in Computer Engineering, Electrical Engineering, or equivalent&nbsp;</li><li><!--block-->10+ years of experience in FPGA RTL architecture, development, verification, deployment, and lifecycle support&nbsp;</li><li><!--block-->Strong proficiency in SystemVerilog or VHDL&nbsp;</li><li><!--block-->Proficiency in at least one scripting language such as TCL, shell, or Python&nbsp;</li><li><!--block-->Experience with advanced verification methodologies, timing analysis, and stability analysis&nbsp;</li><li><!--block-->Ability to read and interpret PCB schematics and understand hardware level constraints&nbsp;</li><li><!--block-->Familiarity with embedded software integration and HW/SW boundary definition&nbsp;</li><li><!--block-->Proficiency with AXI protocols, including AXI4 family&nbsp;</li><li><!--block-->Knowledge of common bus interfaces such as SPI, I2C, UART, and similar standards&nbsp;</li><li><!--block-->Demonstrated success operating with ownership in fast paced, collaborative environments&nbsp;</li></ul><div><!--block--><strong>Additional Responsibilities</strong>&nbsp;</div><ul><li><!--block-->Design and support FPGA systems intended for space environments, including consideration of radiation impacts, mitigation strategies, and long duration reliability</li><li><!--block-->Must be able to lift up to 50 lbs as required for hardware bring up and lab activities</li></ul>",
  "key_responsibilities_header": "What you'll do:",
  "skills_knowledge_expertise_header": "What you'll bring:"
}