Senior Photonics Packaging Engineer RF (f/m/d)

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{
  "id": "2452679",
  "name": "Senior Photonics Packaging Engineer RF (f/m/d)",
  "office": "Stuttgart",
  "keywords": [],
  "schedule": "full-time",
  "createdAt": "2025-12-05T16:01:54+00:00",
  "seniority": "experienced",
  "department": "Operations",
  "occupation": "systems_and_process_engineering",
  "subcompany": null,
  "employmentType": "permanent",
  "jobDescriptions": [
    {
      "name": "Your mission",
      "value": "<span style=\"font-family:Arial, sans-serif;color:#000000;\">The future of AI computing is light. Q.ANT is building photonic processing systems that compute with light – delivering a scalable, energy-efficient alternative to transistor-based architectures for next-generation AI and HPC applications.</span><br><br><span style=\"font-family:Arial, sans-serif;color:#000000;\">As <strong>Senior Photonics Packaging Engineer (f/m/d)</strong>, you will lead the specification, development, and verification of high-density photonic packaging solutions that integrate photonic integrated circuits (PICs), light sources, photodetectors, and analog circuitry into production-ready modules. You'll be the technical authority ensuring that supplier-delivered modules meet stringent optical, electrical, thermal, and mechanical requirements through precise definition of technical requirements, contractual agreements, and supplier project management.</span><br><br><strong><span style=\"font-size:15px;font-family:Arial, Helvetica, sans-serif;\">What makes this role unique:</span></strong><ul style=\"list-style-type:disc;margin-left:26px;\"><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">High complexity</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">: Developing novel high-density photonic packaging concepts that simultaneously address thermal management, optical alignment, RF signal integrity, and manufacturability – an area with few industry precedents</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Strategic freedom</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">: Broad autonomy to define requirements, select suppliers, and design technical strategies within strategic goals and budgetary limits</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Decision authority</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">: Direct influence on supplier relationships, product architecture decisions, and program economics</span></li><li><strong>I</strong><span style=\"font-family:Arial, sans-serif;color:#000000;\"><strong>nnovation mandate:</strong> Implementation of at least one new packaging material, process, or architecture annually that becomes differentiating IP for the company</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Real-world impact</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">: Your work directly enables technology already deployed in production at world-leading institutions like the Leibniz Supercomputing Centre</span></li></ul><br><h3><strong><span style=\"font-family:Arial, sans-serif;font-size:15px;\">Within your first 18-24 months, you will:</span></strong></h3><ul style=\"list-style-type:disc;margin-left:26px;\"><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Achieve leading-edge integration density and performance</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\"> through innovative packaging architectures that enable our photonic processors to deliver up to 30x energy efficiency vs. conventional systems</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Minimize integration risks and rework</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\"> through rigorous supplier verification and quality assurance</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Contribute to competitive advantage</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\"> by accelerating time-to-market and optimizing cost-performance trade-offs in the rapidly scaling photonic computing market</span><br> </li></ul><h3><strong><span style=\"font-family:Arial, sans-serif;font-size:15px;\">Key responsibilities:</span></strong></h3><ul style=\"list-style-type:disc;margin-left:26px;\"><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Cross-functional leadership</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">: Coordinate internal R&D, system engineering, manufacturing, and test teams to align packaging solutions with overall product architecture</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Supplier engagement & interface role</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">: Act as the primary point of contact for suppliers, ensuring alignment on technical goals, schedules, and deliverables, including contract management and negotiation</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Project control</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">: Plan and oversee multi-party R&D projects, tracking milestones, budgets, and risks, while ensuring deliverables are verified and integrated into final systems</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Technical specification</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">: Define complete packaging requirements, including optical coupling techniques, thermal management strategies, RF signal integrity, and hermetic sealing methods</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Quality assurance</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">: Ensure supplier quality ratings maintain ≥95% on-time delivery with zero critical defects, and packaging costs remain within ±5% of budgeted targets</span></li></ul><span style=\"font-family:Arial, sans-serif;color:#000000;\"><br></span>"
    },
    {
      "name": "Your profile",
      "value": "<strong><span style=\"font-family:Arial, sans-serif;font-size:15px;\">Education & Experience:</span></strong><br><ul style=\"list-style-type:disc;margin-left:26px;\"><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">More than 5 years of experience </span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">in<strong> hybrid packaging, photonics assembly, optoelectronic integration, or related high-density interconnect technologies</strong></span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Proven track record</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\"> in managing supplier-led R&D and packaging projects, from requirements definition through to integration and validation</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Hands-on experience</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\"> with PICs, laser sources, photodetectors, analog electronics, and mixed-signal integration</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Master's or PhD </span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">in Photonics, Optoelectronics, Electrical Engineering, Physics, or a related field</span></li></ul><strong><span style=\"font-family:Arial, sans-serif;color:#000000;font-size:15px;\">Deep Technical Expertise in:</span></strong><br><ul style=\"list-style-type:disc;margin-left:26px;\"><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Optical coupling techniques</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\"> (butt-coupling, lens coupling, fiber array integration)</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Thermal management strategies</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\"> for high-power photonic devices</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Understanding and enhancement of RF signal integrity</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\"> for highest performance in different high density interconnects</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Packaging material science</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\"> (polymers, ceramics, metals) and <strong>hermetic sealing</strong> methods</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Relevant standards</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\"> for <strong>reliability</strong> and <strong>environmental testing</strong> (e.g., Telcordia, JEDEC)</span></li></ul><strong><span style=\"font-family:Arial, sans-serif;color:#000000;font-size:15px;\">Tools & Processes:</span></strong><br><ul style=\"list-style-type:disc;margin-left:26px;\"><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Familiarity with CAD tools</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\"> for photonics/electronics packaging, optical simulation software, and statistical process control<br></span></li></ul><strong><span style=\"font-family:Arial, sans-serif;color:#000000;font-size:15px;\">Leadership & Coordination Skills:</span></strong><br><ul style=\"list-style-type:disc;margin-left:26px;\"><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Exceptional ability to lead cross-functional teams</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\"> across R&D, system engineering, manufacturing, and test domains</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Skilled in negotiation and contract management</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\"> with external suppliers and R&D partners</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Strong systems thinking </span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">to balance optical, electrical, thermal, and mechanical requirements simultaneously</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Excellent communication skills</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\"> with the ability to translate complex technical trade-offs to management and stakeholders</span></li></ul><strong><span style=\"font-family:Arial, sans-serif;color:#000000;font-size:15px;\">Languages:</span></strong><br><ul style=\"list-style-type:disc;margin-left:26px;\"><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Fluent in English</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">; German or other European language beneficial</span></li></ul><strong><span style=\"font-family:Arial, sans-serif;color:#000000;font-size:15px;\">Preferred Qualifications:</span></strong><br><ul style=\"list-style-type:disc;margin-left:26px;\"><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Experience with photonic integrated circuit (PIC) packaging</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\"> for AI or HPC applications</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Knowledge of high-speed digital interfaces</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\"> and their integration with photonic systems</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Familiarity with scaling systems</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\"> from prototype to volume production</span></li><li><strong><span style=\"font-family:Arial, sans-serif;color:#000000;\">Understanding of supply chain management and material supplier ecosystems</span></strong><span style=\"font-family:Arial, sans-serif;color:#000000;\"> in photonics</span></li></ul>"
    },
    {
      "name": "Why us?",
      "value": "<ul><li><strong><span style=\"font-family:Arial, sans-serif;\">Make impact at scale:</span></strong><span style=\"font-family:Arial, sans-serif;\"> Help solve one of computing's biggest challenges—making growing demand in compute and sustainability go hand in hand</span></li><li style=\"color:#000000;\"><strong><span style=\"font-family:Arial, sans-serif;\">Work on the leading edge:</span></strong><span style=\"font-family:Arial, sans-serif;\"> Photonic AI acceleration technologies that will define the next decade of computing - already validated in production HPC environments</span></li><li style=\"color:#000000;\"><strong><span style=\"font-family:Arial, sans-serif;\">Own your work from day one:</span></strong><span style=\"font-family:Arial, sans-serif;\"> Broad autonomy and decision authority with direct impact on product success and the future of AI infrastructure</span></li><li style=\"color:#000000;\"><strong><span style=\"font-family:Arial, sans-serif;\">Fast-track your growth:</span></strong><span style=\"font-family:Arial, sans-serif;\"> Work on challenges with few industry precedents—every problem you solve becomes new institutional knowledge and potentially industry-defining IP</span></li><li style=\"color:#000000;\"><strong><span style=\"font-family:Arial, sans-serif;\">World-class team:</span></strong><span style=\"font-family:Arial, sans-serif;\"> Collaborate alongside a passionate, international, cross-functional team of experts in photonics, processor design, and AI systems</span></li><li style=\"color:#000000;\"><strong><span style=\"font-family:Arial, sans-serif;\">Direct access to leadership:</span></strong><span style=\"font-family:Arial, sans-serif;\"> Work closely with the company's founders, including CEO Dr. Michael Förtsch, and advisory board members who shaped the semiconductor industry (ARM, Intel, Infineon)</span></li><li style=\"color:#000000;\"><strong><span style=\"font-family:Arial, sans-serif;\">Collaborative culture:</span></strong><span style=\"font-family:Arial, sans-serif;\"> Innovative work environment that values technical excellence, open communication, and pragmatic problem-solving</span></li><li style=\"color:#000000;\"><strong><span style=\"font-family:Arial, sans-serif;\">Be part of history:</span></strong><span style=\"font-family:Arial, sans-serif;\"> Join at the inflection point where photonic computing transitions from research to mainstream—your contributions will shape this transformation</span></li></ul><span style=\"font-family:Arial, sans-serif;color:#000000;\"> </span><br><span style=\"font-family:Arial, sans-serif;color:#000000;\">We're looking for a technical leader who gets energized by developing novel photonic packaging solutions, managing supplier partnerships, and driving innovations that enable production systems to transform AI computing already today.</span><br><br><span style=\"font-family:Arial, sans-serif;color:#000000;\">Ready to shape the future of photonic integration?</span><br><br><span style=\"font-family:Arial, sans-serif;color:#000000;\">We are looking forward to receiving your application! </span><br><br><em><span style=\"font-family:Arial, sans-serif;color:#000000;\">Q.ANT is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.</span></em>"
    }
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