Principal DFT Engineer

{
  "content_hash": "c4e9cc4bebe598e8d94353777d0040473d3d9412b8c49cd66304ec3c516ae395",
  "source_hash": "8b249157fe8e18f12e12d9036c89d1e3398cf93cb6b8a5b4b27c9fdfa0793e34",
  "last_changed_at": "2026-06-06T08:25:08.718Z",
  "active_status": "active"
}

{
  "language": "en",
  "location": {
    "raw": "Carlsbad, CA, US",
    "city": "Carlsbad",
    "region": "CA",
    "country": "United States",
    "is_remote": false,
    "confidence": 0.8
  },
  "salary_max": 193000,
  "salary_min": 155000,
  "inferred_at": "2026-06-06T08:25:08.709Z",
  "launch_scope": {
    "reason": "english_us_canada",
    "included": true,
    "language": "en",
    "location": {
      "raw": "Carlsbad, CA, US",
      "city": "Carlsbad",
      "region": "CA",
      "country": "United States",
      "is_remote": false,
      "confidence": 0.8
    },
    "countries": [
      "United States"
    ]
  },
  "remote_policy": null,
  "salary_period": "year",
  "workplace_type": null,
  "salary_currency": "USD"
}

{}

{
  "json_ld": {
    "url": "https://careersus-maxlinear.icims.com/jobs/3004/principal-dft-engineer/job",
    "@type": "JobPosting",
    "title": "Principal DFT Engineer",
    "@context": "http://schema.org",
    "datePosted": "2024-06-06T08:25:08.368Z",
    "description": "<h2>Responsibilities</h2>\n<p>MaxLinear is seeking a Principal DFT (Design For Test) Engineer to join our team. In this role, you will focus on the following:</p>\n<p> </p>\n<ul>\n <li>Lead DFT and implementation of DFT techniques on System on Chip (SOC)</li>\n <li>Define DFT architecture, RTL coding, simulation and verification, chip testing, and supporting Automatic Test Equipment (ATE) issues</li>\n <li>Develop DFT methodologies that reduce test cost, increase product quality, and enhance yield learning on leading edge process technologies</li>\n <li>Generate DFT pattern, coverage analysis, and debug as well as running and debugging gate level simulations</li>\n <li>Assist Test Engineers to bring up ATPG and MBIST pattern on the ATE</li>\n <li>Resolve issues during characterization</li>\n</ul>\n<h2>Qualifications</h2>\n<ul>\n <li>Strong understanding of Fault modeling, Scan compression, and Memory testing techniques</li>\n <li>Experience in all aspects of DFT flow, including DC/AC scan, ATPG, JTAG/boundary SCAN, memory BIST, high speed interface test</li>\n <li>Understanding of the entire ASIC design flow: logic design, Verilog/VHDL verification, synthesis, timing, and backend</li>\n <li>Proven record of supporting a large volume of commercial SOC shipments</li>\n <li>Excellent analytical and debugging skills and the ability to proactively resolve issues</li>\n <li>Must be able to work autonomously and guide others based on changing priorities</li>\n <li>Proven ability to thrive on, learn, and adapt to new methodologies and technologies</li>\n <li>Excellent oral and written communication skills</li>\n <li>BS in Electrical Engineering or related + 9 years of experience, or MS + 7 years of experience, or Ph.D. + 4 years of experience</li>\n</ul>\n<h2>Compensation and Benefits</h2>\n<p>MaxLinear has a Total Compensation philosophy which includes base salary and annual discretionary bonus eligibility and many positions also include stock-based compensation.</p>\n<p> </p>\n<p>MaxLinear's good faith estimate starting base salary range is:  $155,000 to $193,000 Annually</p>\n<p> </p>\n<p>We offer competitive benefits designed to support employee health, welfare, and retirement and some highlights are:  health care benefits, 401k savings plan, Employee Stock Purchase Plan (ESPP), and paid time off.</p>\n<p> </p>\n<p>The actual starting base salary will be determined by the match to certain role-related criteria such as educational degree(s) or equivalent, relevant work experience, skillset needed for the role, and geographic location; this is not an all-inclusive list as some roles may require unique skills or experience.</p>\n<p> </p>\n<p>Qualified applicants will receive consideration for employment without regard to, and will not be discriminated against based on race, sex, religion, national origin, sexual orientation, gender identity, disability, or protected veteran status.</p>\n<h2>Company Overview</h2>\n<p>MaxLinear is a global, NASDAQ-traded company (MXL) where the entrepreneurial spirit is alive and well. We are a fabless system-on-chip product company, striving to improve the world’s communication networks for everyone through our highly integrated radio-frequency (RF), analog, digital, and mixed-signal semiconductor solutions for access and connectivity, wired and wireless infrastructure, and industrial and multi-market applications.</p>\n<p> </p>\n<p>We hire the best people in the industry and engage them in some of the most exciting opportunities that connect the world we live in today. Our growth has come from innovative, bold approaches to solving some of the world’s most challenging communication technology problems in the most efficient and effective manner.</p>\n<p> </p>\n<p>MaxLinear began by developing the world’s first high-performance TV tuner chip using standard CMOS process technology. Others said we couldn’t achieve the extremely high-performance requirements using CMOS, but we proved them wrong and achieved enduring global market leadership with our designs. Since then, we’ve developed a full line of products that drive 4G and 5G infrastructure; enable data center, metro and long-haul optical interconnects; bring 10Gbit to the home; power the IoT revolution; and enable robust and reliable communication in harsh industrial environments. Over the years, we’ve expanded through organic growth and through several acquisitions that have perfectly complemented our existing portfolio and enabled us to deliver complete end-to-end solutions in our target markets. One such example was the acquisition of Intel’s Home Gateway Platform Division that added Wi-Fi, Ethernet, and Broadband Gateway Processor SoC technology to our connected home portfolio creating a complete and scalable platform of connectivity and access solutions to fully address our customers’ needs.</p>\n<p> </p>\n<p>Our headquarters are in Carlsbad, near San Diego, California. We also have major design centers in Irvine and San Jose, California; Valencia, Spain; Bangalore, India; Munich, Germany; Israel; and Singapore.</p>\n<p> </p>\n<p>We have approximately 1,200 employees, a substantial majority of whom have engineering degrees and include masters and Ph.D. graduates from many of the premiere universities around the world. Our employees thrive on innovation, outstanding execution, outside-the-box thinking, nimbleness, and collaboration. Together, we form a high-energy business team that is focused on building the best and most innovative products on the market.</p>",
    "directApply": true,
    "jobLocation": [
      {
        "@type": "Place",
        "address": {
          "@type": "PostalAddress",
          "postalCode": "92008",
          "addressRegion": "CA",
          "streetAddress": "5966 La Place Ct",
          "addressCountry": "US",
          "addressLocality": "Carlsbad",
          "postOfficeBoxNumber": "UNAVAILABLE"
        }
      },
      {
        "@type": "Place",
        "address": {
          "@type": "PostalAddress",
          "postalCode": "UNAVAILABLE",
          "addressRegion": "CA",
          "streetAddress": "UNAVAILABLE",
          "addressCountry": "US",
          "addressLocality": "Irvine",
          "postOfficeBoxNumber": "UNAVAILABLE"
        }
      }
    ],
    "validThrough": "2027-06-06T08:25:08.368Z",
    "employmentType": "FULL_TIME",
    "responsibilities": "MaxLinear is seeking a Principal DFT (Design For Test) Engineer to join our team. In this role, you will focus on the following:\r\n \r\n- Lead DFT and implementation of DFT techniques on System on Chip (SOC)\r\n- Define DFT architecture, RTL coding, simulation and verification, chip testing, and supporting Automatic Test Equipment (ATE) issues\r\n- Develop DFT methodologies that reduce test cost, increase product quality, and enhance yield learning on leading edge process technologies\r\n- Generate DFT pattern, coverage analysis, and debug as well as running and debugging gate level simulations\r\n- Assist Test Engineers to bring up ATPG and MBIST pattern on the ATE\r\n- Resolve issues during characterization",
    "hiringOrganization": {
      "name": "MaxLinear, Inc.",
      "@type": "Organization",
      "sameAs": "www.maxlinear.com"
    },
    "occupationalCategory": "ASIC Engineering"
  },
  "detail_meta": {
    "url": "https://careersus-maxlinear.icims.com/jobs/3004/principal-dft-engineer/job?in_iframe=1",
    "http_status": 200,
    "content_type": "text/html;charset=UTF-8",
    "response_bytes": 47582,
    "compact_response_bytes": 7533,
    "original_response_bytes": 47582
  },
  "sitemap_job": {
    "id": "3004",
    "url": "https://careersus-maxlinear.icims.com/jobs/3004/principal-dft-engineer/job",
    "slug": "principal-dft-engineer",
    "lastmod": "2026-04-23T16:41:27-04:00"
  },
  "detail_errors": []
}