Chip Lead: Analog & Mixed-Signal Layout Engineer

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{
  "lists": [
    {
      "text": "Qualifications",
      "content": "<li>10+  years experience in high performance analog layout in advance Finfet/CMOS process nodes&nbsp;</li><li>Experience with layouts of high performance and high speed  analog blocks (such as ADC, DAC, PLL, and SERDES, for example)</li><li>Should be able to lead the project</li><li>Experience with analog  layout techniques such as common centroid, interdigitation, shielding, dummy devices, EM aware routing on critical block, and must be versed with with VXL compliant methodology&nbsp;</li><li>Familiarity in various physical verification checks DRC, LVS, DFM, ERC, EM, IR etc.&nbsp;</li><li>Layout Automation using SKILL/PERL/Python is a plus</li><li>Self starter with the ability to define and adhere to schedule and methodology</li><li>Must possess strong social skill and be an excellent team mate</li><div><br></div>"
    }
  ],
  "country": "US",
  "createdAt": 1760638261983,
  "updatedAt": null,
  "categories": {
    "team": "Layout Design",
    "location": "Milpitas",
    "commitment": "Full-time",
    "department": "Engineering",
    "allLocations": [
      "Milpitas",
      "Fort Collins",
      "Billerica"
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