Home › Companies › Eridu › Emulation Engineer
Emulation Engineer
Eridu · Saratoga, CA, United States · On Site · Active · $185,000–$250,000 / year · Rippling ATS
Job facts
| Field | Value |
|---|---|
| Company | Eridu |
| Title | Emulation Engineer |
| Normalized title | - |
| Department / team | ASIC Engineering |
| Location | Saratoga, CA, United States |
| Work model | On Site |
| Employment type | Full Time |
| Salary | $185,000–$250,000 / year |
| Status | active |
| ATS provider | Rippling ATS |
| Posted / first seen | 2025-10-29 / 2026-05-29 |
| Changed / last seen | 2026-06-06 / 2026-06-06 |
Related slices
| Page | What it contains | Open |
|---|---|---|
| Company jobs | Active postings from Eridu. | Open |
| Company breakdowns | Role, location, ATS, and work model facets for this company. | Open |
| ATS provider jobs | Active postings observed through Rippling ATS. | Open |
| Provider filtered search | The same provider as a filtered job collection. | Open |
| City jobs | Active postings in Saratoga. | Open |
| Department jobs | Active postings in ASIC Engineering. | Open |
| Work model jobs | Active On Site postings. | Open |
| Lifecycle events | Open, update, close, and reopen events for this posting. | Open |
| Original posting | Canonical source or apply URL captured from the ATS. | Open |
Linked records
| Company | Eridu |
| Source | 2e3b3faf-1f18-443b-b03c-ab436c316a6b |
| ATS provider | Rippling ATS |
Description
company
About Eridu Eridu is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate AI data centers to deliver Faster AI . Today’s AI performance is frequently limited by communication bottlenecks. Eridu introduces multiple industry-first innovations across silicon, packaging, software, and systems to deliver an order of magnitude improvement in performance and unlock greater GPU utilization to speed training job completion times and tokens-per-second for more profitable inference. We do this while simultaneously reducing capital and power costs and improving reliability.
The company’s solutions and value proposition have been widely validated by leading hyperscalers.
Eridu has raised over $200M to date including its most recent, oversubscribed Series A round. The company is led by a veteran team of Silicon Valley executives who have delivered multiple billion dollar product lines and led multiple companies to billion dollar exits, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ: INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (the world’s leading micro-LED company). The company is in execution mode and has a world-class engineering team with decades of experience in state-of-the-art silicon, packaging, optics, software, and systems. Eridu is working with best-in-class supply chain partners including silicon, packaging and systems.
Visit our website eridu.ai to learn more.
role
Position Overview We are seeking a highly skilled and motivated Emulation Engineer to join our hardware development team. The ideal candidate will be responsible for building and deploying emulation and FPGA models from RTL designs using industry-standard tools and methodologies. This role involves close collaboration with cross-functional teams including design, software, firmware, and validation to accelerate hardware verification and software development.
Responsibilities Develop and deliver emulation models from RTL using synthesis, partitioning, and routing tools. Plan and execute simulation acceleration, emulation, and prototyping activities aligned with project milestones. Design and implement high-performance transactors and emulation testbenches using SystemVerilog and C/C++/DPI. Drive emulation methodologies for hardware verification and software/firmware development. Build system-level use cases for execution on emulators and support platform bring-up. Analyze emulation results, identify performance regressions, and triage issues. Conduct power measurements and performance evaluations on emulation platforms. Maintain and enhance emulation CI infrastructure to support autonomous performance exploration. Collaborate with vendors to debug issues and deploy new emulation capabilities. Interface with design, validation, and software teams to optimize emulation environments and workflows. Qualifications Bachelor’s degree in Electrical/Computer Engineering with a minimum of 7+ years of relevant experience, or Master’s degree with 5+ years of experience. Strong background in ASIC logic/RTL design and emulation model development. Required Skills Proficiency in Verilog/SystemVerilog, C/C++, Python, and Unix Shell scripting. Experience with emulation platforms such as Palladium, Veloce, Zebu, or FPGA prototyping. Familiarity with emulation tools and methodologies including BFMs, transactors, and hybrid environments. Ability to debug hardware issues using waveforms, logs, and trace dumps. Experience with CI/CD tools (e.g., Jenkins, GitLab CI) for automation and integration. Excellent problem-solving, debugging, and analytical skills. Preferred Skills Experience in building workloads for pre-silicon environments. Knowledge of emulation performance optimization techniques. Exposure to system-level use case development and power/performance analysis. Experience with computer networking protocols such as Ethernet. Experience with network test equipment such as Ixia/Spirent traffic generators.
Why Join Us? At Eridu, you’ll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI infrastructure solutions, transforming the performance of AI data centers.
The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.
Notice to Recruiting Agencies Eridu does not accept unsolicited resumes or candidate profiles from staffing agencies or third-party recruiters. Any candidate submitted to Eridu without prior written authorization from our recruiting team will be considered unsolicited and will become the property of Eridu. Eridu reserves the right to pursue and hire such candidates without any obligation to pay fees. Recruiting agencies are expressly instructed not to contact hiring managers, employees, or executives regarding open positions.
Full job record
| Job ID | 45a3df3c063f6a1b48671b8dbb384b505635bf2f |
| Org ID | d05d9cdc-fa71-444b-b57a-6140fe525606 |
| Source ID | 2e3b3faf-1f18-443b-b03c-ab436c316a6b |
| Board ID | 2e3b3faf-1f18-443b-b03c-ab436c316a6b |
| Provider | rippling |
| Provider Job Key | 16e3848e-f1f6-4032-9723-1b30e51e474a |
| Title | Emulation Engineer |
| Normalized Title | — |
| Status | active |
| Active | yes |
| Location Text | Saratoga, CA, United States |
| Department | ASIC Engineering |
| Team | — |
| Employment Type | full_time |
| Workplace Type | on_site |
| Remote Policy | — |
| Country | United States |
| Region | CA |
| City | Saratoga |
| Salary Raw | USD 185000-250000 YEAR |
| Salary Min | 185,000 |
| Salary Max | 250,000 |
| Salary Currency | USD |
| Salary Period | year |
| Source URL | https://ats.rippling.com/eridu-ai/jobs/16e3848e-f1f6-4032-9723-1b30e51e474a |
| Apply URL | https://ats.rippling.com/eridu-ai/jobs/16e3848e-f1f6-4032-9723-1b30e51e474a |
| First Seen At | 2026-05-29 07:14:02Z |
| Last Seen At | 2026-06-06 19:44:35Z |
| Last Checked At | 2026-06-06 19:44:35Z |
| Last Changed At | 2026-06-06 19:44:35Z |
| Inactive At | — |
| Source Posted At | 2025-10-29 23:30:30Z |
| Source Updated At | — |
| Raw Payload Uri | s3://job-postings-prod-raw-590183727216/raw/provider=rippling/board=eridu-ai/date=2026-06-06/2026-06-06T19-44-33-762Z-4b761a1811184974f9facfa7bb3d3a7e8696180848a08b199b5b79a934e7d18e.json |
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"role": "<meta><h1 style=\"font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:18pt;font-weight:600;letter-spacing:1px;margin-top:24px;margin-bottom:4px;padding-left:0px;\"><b><strong style=\"white-space:pre-wrap;\">Position Overview</strong></b></h1><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"color:rgb(0,0,0);white-space:pre-wrap;\">We are seeking a highly skilled and motivated Emulation Engineer to join our hardware development team. The ideal candidate will be responsible for building and deploying emulation and FPGA models from RTL designs using industry-standard tools and methodologies. This role involves close collaboration with cross-functional teams including design, software, firmware, and validation to accelerate hardware verification and software development.</span></p><h1 style=\"font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:18pt;font-weight:600;letter-spacing:1px;margin-top:24px;margin-bottom:4px;padding-left:0px;\"><b><strong style=\"white-space:pre-wrap;\">Responsibilities </strong></b></h1><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Develop and deliver emulation models from RTL using synthesis, partitioning, and routing tools.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Plan and execute simulation acceleration, emulation, and prototyping activities aligned with project milestones.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Design and implement high-performance transactors and emulation testbenches using SystemVerilog and C/C++/DPI.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Drive emulation methodologies for hardware verification and software/firmware development.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Build system-level use cases for execution on emulators and support platform bring-up.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Analyze emulation results, identify performance regressions, and triage issues.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Conduct power measurements and performance evaluations on emulation platforms.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Maintain and enhance emulation CI infrastructure to support autonomous performance exploration.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Collaborate with vendors to debug issues and deploy new emulation capabilities.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Interface with design, validation, and software teams to optimize emulation environments and workflows.</span></li></ul><h1 style=\"font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:18pt;font-weight:600;letter-spacing:1px;margin-top:24px;margin-bottom:4px;padding-left:0px;\"><b><strong style=\"white-space:pre-wrap;\">Qualifications</strong></b></h1><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Bachelor’s degree in Electrical/Computer Engineering with a minimum of 7+ years of relevant experience, or Master’s degree with 5+ years of experience.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Strong background in ASIC logic/RTL design and emulation model development.</span></li></ul><h3 style=\"font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:14pt;font-weight:600;letter-spacing:0.25px;margin-top:14px;margin-bottom:4px;text-align:start;padding-left:0px;\"><span style=\"white-space:pre-wrap;\">Required Skills</span></h3><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Proficiency in Verilog/SystemVerilog, C/C++, Python, and Unix Shell scripting.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Experience with emulation platforms such as Palladium, Veloce, Zebu, or FPGA prototyping.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Familiarity with emulation tools and methodologies including BFMs, transactors, and hybrid environments.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Ability to debug hardware issues using waveforms, logs, and trace dumps.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Experience with CI/CD tools (e.g., Jenkins, GitLab CI) for automation and integration.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Excellent problem-solving, debugging, and analytical skills.</span></li></ul><h3 style=\"font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:14pt;font-weight:600;letter-spacing:0.25px;margin-top:14px;margin-bottom:4px;text-align:start;padding-left:0px;\"><span style=\"white-space:pre-wrap;\">Preferred Skills</span></h3><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Experience in building workloads for pre-silicon environments.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Knowledge of emulation performance optimization techniques.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Exposure to system-level use case development and power/performance analysis.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Experience with computer networking protocols such as Ethernet.</span></li><li style=\"font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:start;\"><span style=\"white-space:pre-wrap;\">Experience with network test equipment such as Ixia/Spirent traffic generators.</span></li></ul><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:start;\"><br></p><h2 style=\"font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:15pt;font-weight:600;letter-spacing:0.5px;margin-top:18px;margin-bottom:4px;text-align:start;padding-left:0px;\"><b><strong style=\"color:black;white-space:pre-wrap;\">Why Join Us? </strong></b></h2><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"color:black;font-size:11pt;white-space:pre-wrap;\">At Eridu, you’ll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI infrastructure solutions, transforming the performance of AI data centers. </span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"color:black;font-size:11pt;white-space:pre-wrap;\"> </span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"color:black;font-size:11pt;white-space:pre-wrap;\">The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles. </span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"font-size:11pt;white-space:pre-wrap;\"> </span></p><h6 style=\"font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:13pt;font-weight:600;letter-spacing:0.25px;margin-top:8px;margin-bottom:4px;padding-left:0px;\"><b><strong style=\"white-space:pre-wrap;\">Notice to Recruiting Agencies</strong></b></h6><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Eridu does not accept unsolicited resumes or candidate profiles from staffing agencies or third-party recruiters. Any candidate submitted to Eridu without prior written authorization from our recruiting team will be considered unsolicited and will become the property of Eridu. Eridu reserves the right to pursue and hire such candidates without any obligation to pay fees. Recruiting agencies are expressly instructed not to contact hiring managers, employees, or executives regarding open positions.</span></p>",
"company": "<meta><h1 style=\"font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:18pt;font-weight:600;letter-spacing:1px;margin-top:24px;margin-bottom:4px;padding-left:0px;\"><b><strong style=\"color:black;white-space:pre-wrap;\">About Eridu</strong></b></h1><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Eridu is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate AI data centers to deliver </span><i><em style=\"font-size:11pt;white-space:pre-wrap;\">Faster AI</em></i><span style=\"font-size:11pt;white-space:pre-wrap;\">. Today’s AI performance is frequently limited by communication bottlenecks. Eridu introduces multiple industry-first innovations across silicon, packaging, software, and systems to deliver an order of magnitude improvement in performance and unlock greater GPU utilization to speed training job completion times and tokens-per-second for more profitable inference. We do this while simultaneously reducing capital and power costs and improving reliability.</span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><br></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">The company’s solutions and value proposition have been widely validated by leading hyperscalers.</span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><br></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Eridu has raised over $200M to date including its most recent, oversubscribed Series A round. The company is led by a veteran team of Silicon Valley executives who have delivered multiple billion dollar product lines and led multiple companies to billion dollar exits, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ: INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (the world’s leading micro-LED company). The company is in execution mode and has a world-class engineering team with decades of experience in state-of-the-art silicon, packaging, optics, software, and systems. Eridu is working with best-in-class supply chain partners including silicon, packaging and systems.</span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><br></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">Visit our website </span><a href=\"https://eridu.ai\" target=\"_blank\" class=\"css-173makr-linkStyle\" style=\"color:rgb(30,74,169);cursor:pointer;\"><span style=\"font-size:11pt;white-space:pre-wrap;\">eridu.ai </span></a><span style=\"font-size:11pt;white-space:pre-wrap;\">to learn more.</span></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11.25pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:left;\"><br></p>"
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