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HomeCompaniesTelesatSenior FPGA Design Engineer

Senior FPGA Design Engineer

Telesat · Ottawa, Ontario · Hybrid · Active · Lever

Job facts

FieldValue
CompanyTelesat
TitleSenior FPGA Design Engineer
Normalized title-
Department / teamLightspeed System Development - Landing Stations and User Terminals / User Terminal Segment
LocationOttawa, ON, Canada
Work modelHybrid / Hybrid
Employment typeFull Time Hire (FTE With Benefits)
Salary-
Statusactive
ATS providerLever
Posted / first seen2026-06-15 / 2026-06-18
Changed / last seen2026-06-18 / 2026-06-18

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Company jobsActive postings from Telesat.Open
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ATS provider jobsActive postings observed through Lever.Open
Provider filtered searchThe same provider as a filtered job collection.Open
City jobsActive postings in Ottawa.Open
Department jobsActive postings in Lightspeed System Development - Landing Stations and User Terminals.Open
Work model jobsActive Hybrid postings.Open
Lifecycle eventsOpen, update, close, and reopen events for this posting.Open
Original postingCanonical source or apply URL captured from the ATS.Open

Linked records

CompanyTelesat
Sourcece97cc35-0bdf-4d03-a1a6-dc0e1138445e
ATS providerLever

Description

Telesat (Nasdaq and TSX: TSAT) is a leading global satellite operator, providing reliable and secure satellite-delivered communications solutions worldwide to broadcast, telecommunications, corporate and government customers for over 55 years.  Backed by a legacy of engineering excellence, reliability and industry-leading customer service, Telesat has grown to be one of the largest and most successful global satellite operators. Telesat Lightspeed, our revolutionary Low Earth Orbit (LEO) satellite network, scheduled to begin service in 2027, will revolutionize global broadband connectivity for enterprise and Government users by delivering a combination of high capacity, security, resiliency and affordability with ultra-low latency and fiber-like speeds. Telesat is headquartered in Ottawa, Canada, and has offices and facilities around the world. The company’s state-of-the-art Satellite fleet consists of 12 GEO satellites, the Canadian payload on ViaSat-1 and one LEO 3 demonstration satellite.  For more information, follow Telesat on X and LinkedIn or visit www.telesat.com We are seeking a highly skilled FPGA Designer to join our engineering team in Ottawa, supporting the development of advanced satellite modem technologies.  In this role, you will own the design and delivery of FPGA subsystems from architecture definition through hardware validation, contributing to high-performance digital signal processing (DSP) implementations on FPGA platforms. You will work on systems enabling next-generation communications capabilities in demanding environments, requiring strong expertise in FPGA development, modem architectures, and high-speed data processing systems. At Telesat, we take pride in being an equal opportunity employer that values equality in the workplace.   We are committed to providing the best candidate experience possible including any required accommodations at every stage of our interview process.   All qualified applicants that have been selected for an interview that require accommodations, are advised to inform the Telesat Talent team accordingly.  We will work with you to meet your needs.   All accommodation information provided will be treated as confidential. Main Responsibilities Own the design and implementation of FPGA-based digital modem components for satellite or wireless communication systems Design high-throughput FPGA architectures supporting multi‑Gbps data paths and real-time processing constraints Develop low-latency DSP blocks (e.g., modulation/demodulation, FEC, filtering, framing) Translate system and algorithm requirements into efficient and scalable FPGA architectures Perform RTL design using VHDL and/or Verilog/SystemVerilog Integrate and optimize designs, including third-party FPGA IP cores, for performance, power, and resource utilization Develop and execute verification plans, including simulation, testbench creation, and hardware validation Support full FPGA design lifecycle including synthesis, timing closure, and lab bring-up Work closely with system architects, algorithm developers, embedded software teams, and hardware engineers to ensure seamless integration Support hardware bring-up, debugging, and system-level testing in lab environments Contribute to documentation, design reviews, and continuous improvement of development processes Participate in design trade-offs and performance analysis for future modem features Education and Experience Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field 8+ years of experience in FPGA design and development (or equivalent combination of education and experience) Strong proficiency in RTL design using VHDL and/or Verilog/SystemVerilog Experience with FPGA toolchains (e.g., Xilinx Vivado, Intel Quartus) Solid understanding of digital signal processing concepts and communication systems Experience implementing high-speed data paths and pipelined architectures Familiarity with simulation and verification tools (ModelSim, Questa, VCS, etc.) Experience with hardware debugging tools (e.g., logic analyzers, ILA) Strong problem-solving skills and ability to work in a collaborative team environment Specialized Knowledge, Skills, and Abilities Experience with satellite communications or wireless modem design Knowledge of forward error correction (FEC) schemes (LDPC, Turbo, etc.) Familiarity Familiarity with wideband or high-throughput modem systems (e.g., DVB-S2X, 5G PHY) Experience with high-speed interfaces (e.g., JESD204, Ethernet, PCIe, SerDes) Experience with FPGA SoC platforms and integration with embedded processors (e.g., ARM-based systems) Exposure to high-level synthesis (HLS) tools and methodologies Experience with MATLAB/Simulink or Python for algorithm development and validation Understanding of fixed-point design and optimization techniques Experience with modern verification methodologies (e.g., UVM, constrained-random, coverage-driven verification) Experience working in Agile or iterative development environments Soft Skills Strong communication skills with the ability to clearly present technical concepts Ability to manage multiple tasks and priorities in a fast-paced environment Detail-oriented with a focus on quality and reliability Proactive mindset with a passion for innovation and continuous learning Working Conditions Resource is required to be in office four (4) days weekly Occasional international travel is required in this role Must qualify for government clearance

Full job record

Job ID40e2f24e1880a8a6b415b9013e4bf75d2d50e519
Org ID174342dd-3d25-49be-ad47-11d85d0c042e
Source IDce97cc35-0bdf-4d03-a1a6-dc0e1138445e
Board IDce97cc35-0bdf-4d03-a1a6-dc0e1138445e
Providerlever
Provider Job Keyc1add8f7-bb72-4ad9-8ae0-ea6a8dcf6045
TitleSenior FPGA Design Engineer
Normalized Title
Statusactive
Activeyes
Location TextOttawa, Ontario
DepartmentLightspeed System Development - Landing Stations and User Terminals
TeamUser Terminal Segment
Employment TypeFull Time Hire - (FTE with Benefits)
Workplace Typehybrid
Remote Policyhybrid
CountryCanada
RegionON
CityOttawa
Salary Raw
Salary Min
Salary Max
Salary Currency
Salary Period
Source URLhttps://jobs.lever.co/telesat/c1add8f7-bb72-4ad9-8ae0-ea6a8dcf6045
Apply URLhttps://jobs.lever.co/telesat/c1add8f7-bb72-4ad9-8ae0-ea6a8dcf6045/apply
First Seen At2026-06-18 07:57:14Z
Last Seen At2026-06-18 07:57:14Z
Last Checked At2026-06-18 07:57:14Z
Last Changed At2026-06-18 07:57:14Z
Inactive At
Source Posted At2026-06-15 16:20:52Z
Source Updated At
Raw Payload Uris3://job-postings-prod-raw-590183727216/raw/provider=lever/board=telesat/date=2026-06-18/2026-06-18T07-57-14-458Z-3e0120131dc833d2179555ea29a17b64b15e4f1634ddcf70afa59b89a838ef93.json
Event Fields
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Parsed Structured
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Extensions
{}
Native Structured
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    {
      "text": "Main Responsibilities",
      "content": "\n<li>Own the design and implementation of FPGA-based digital modem components for satellite or wireless communication systems</li>\n<li>Design high-throughput FPGA architectures supporting multi‑Gbps data paths and real-time processing constraints</li>\n<li>Develop low-latency DSP blocks (e.g., modulation/demodulation, FEC, filtering, framing)</li>\n<li>Translate system and algorithm requirements into efficient and scalable FPGA architectures</li>\n<li>Perform RTL design using VHDL and/or Verilog/SystemVerilog</li>\n<li>Integrate and optimize designs, including third-party FPGA IP cores, for performance, power, and resource utilization</li>\n<li>Develop and execute verification plans, including simulation, testbench creation, and hardware validation</li>\n<li>Support full FPGA design lifecycle including synthesis, timing closure, and lab bring-up</li>\n<li>Work closely with system architects, algorithm developers, embedded software teams, and hardware engineers to ensure seamless integration</li>\n<li>Support hardware bring-up, debugging, and system-level testing in lab environments</li>\n<li>Contribute to documentation, design reviews, and continuous improvement of development processes</li>\n<li>Participate in design trade-offs and performance analysis for future modem features</li>\n"
    },
    {
      "text": "Education and Experience",
      "content": "\n<li>Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field</li>\n<li>8+ years of experience in FPGA design and development (or equivalent combination of education and experience)</li>\n<li>Strong proficiency in RTL design using VHDL and/or Verilog/SystemVerilog</li>\n<li>Experience with FPGA toolchains (e.g., Xilinx Vivado, Intel Quartus)</li>\n<li>Solid understanding of digital signal processing concepts and communication systems</li>\n<li>Experience implementing high-speed data paths and pipelined architectures</li>\n<li>Familiarity with simulation and verification tools (ModelSim, Questa, VCS, etc.)</li>\n<li>Experience with hardware debugging tools (e.g., logic analyzers, ILA)</li>\n<li>Strong problem-solving skills and ability to work in a collaborative team environment</li>\n"
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      "text": "Specialized Knowledge, Skills, and Abilities",
      "content": "\n<li>Experience with satellite communications or wireless modem design</li>\n<li>Knowledge of forward error correction (FEC) schemes (LDPC, Turbo, etc.) Familiarity</li>\n<li>Familiarity with wideband or high-throughput modem systems (e.g., DVB-S2X, 5G PHY)</li>\n<li>Experience with high-speed interfaces (e.g., JESD204, Ethernet, PCIe, SerDes)</li>\n<li>Experience with FPGA SoC platforms and integration with embedded processors (e.g., ARM-based systems)</li>\n<li>Exposure to high-level synthesis (HLS) tools and methodologies</li>\n<li>Experience with MATLAB/Simulink or Python for algorithm development and validation</li>\n<li>Understanding of fixed-point design and optimization techniques</li>\n<li>Experience with modern verification methodologies (e.g., UVM, constrained-random, coverage-driven verification)</li>\n<li>Experience working in Agile or iterative development environments</li>\n"
    },
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      "text": "Soft Skills",
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    },
    {
      "text": "Working Conditions",
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    }
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