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HomeCompaniesSolidigmDesign Verification Engineer

Design Verification Engineer

Solidigm · Rancho Cordova, CA, United States · Deleted · $121,280–$194,100 / year · SmartRecruiters

Job facts

FieldValue
CompanySolidigm
TitleDesign Verification Engineer
Normalized title-
Department / teamNAND Development
LocationRancho Cordova, CA, United States
Work model-
Employment typeFull Time
Salary$121,280–$194,100 / year
Statusdeleted
ATS providerSmartRecruiters
Posted / first seen2026-03-23 / 2026-05-31
Changed / last seen2026-06-11 / 2026-06-09

Related slices

PageWhat it containsOpen
Company jobsActive postings from Solidigm.Open
Company breakdownsRole, location, ATS, and work model facets for this company.Open
ATS provider jobsActive postings observed through SmartRecruiters.Open
Provider filtered searchThe same provider as a filtered job collection.Open
City jobsActive postings in Rancho Cordova.Open
Department jobsActive postings in NAND Development.Open
Lifecycle eventsOpen, update, close, and reopen events for this posting.Open
Original postingCanonical source or apply URL captured from the ATS.Open

Linked records

CompanySolidigm
Sourced2d76f72-69cc-40d9-8c6f-d41778e65e1a
ATS providerSmartRecruiters

Description

Join a multibillion-dollar global company that brings together amazing technology, people, and operational scale to become a powerhouse in the memory industry. Headquartered in Rancho Cordova, California, Solidigm combines elements of an established, successful technology company with the spirit, agility, and entrepreneurial mindset of a start-up. In addition to the U.S. headquarters and other facilities in the U.S., the company has international presence in Asia, Europe, and the Americas. Solidigm will continue to lead the world in innovating new Memory technologies with aspirations to be the #1 NAND memory company in the world. At Solidigm, we view problems as opportunities to define innovative solutions that hold the power to change the world and unleash the potential technological needs that the future holds. At Solidigm, we are One Team that fosters a diverse, equitable, and inclusive culture that embraces individual uniqueness and empowers us to bring our best selves to deliver excellence in support of Solidigm's vision and mission to be the go-to partner for optimized data storage solutions. You can be part of the takeoff of an innovative business that develops cutting-edge products, delivers strong business value for customers, provides an engaging workplace for its employees, and serves a greater impact on the world. This is a golden opportunity for the right applicant to join us and help design, build, and lead Solidigm. We want a diverse team of dedicated professionals who will not just be Solidigm team members but contribute to how we shape the future of the organization. We are seeking applicants who will grow and thrive in our culture; be customer inspired, trusting, innovative, team-oriented, inclusive, results driven, collaborative, passionate, and flexible. Component Design Engineers are responsible for the design and development of electronic components. Responsibilities may include: the design of chip layout circuit design, circuit checking, device evaluation and characterization, documentation of specifications, prototype construction and checkout, modification and evaluation of semiconductor devices and components, performing developmental and/or test work, reviewing product requirements and logic diagrams, planning and organizing design projects or phases of design projects. Responds to customer/client requests or events as they occur. Develops solutions to problems utilizing formal education and judgement. Key responsibilities Create/update test plan based on design specification and create UVM based direct/constrained-random tests. Debug the simulation and quickly identify design or test issues. Define functional coverage and perform coverage analysis Create/update the SVAs (system-verilog assertions) for 3D NAND design based on verification requirements UVM based verification environment updates. Mixed-signal fullchip modeling includes analog behavioral modeling, cell-level testbench, fullchip level mixed-signal netlist and testbench. Develop scripts to automate the verification flow and data-collections. Master’s degree with 3+ years experiences or bachelor degree with 5+ years experiences in electrical engineering, Computer Engineering, Computer Science Prior experience in memory product pre-silicon verification Working experience in UVM, system Verilog assertions, Formal Property Verification In-depth knowledge of mixed-signal verification and working experience in mixed-signal design modeling and simulation Fundamental digital and analog circuit design knowledge. Solid data analysis capability, communication and presentation skills Strong independent debugging and problem-solving skills Excellent written and verbal communication skills The compensation range for this role is $121,280 - $194,100. Actual compensation is influenced by a variety of factors including but not limited to skills, experience, qualifications, and geographic location. Powered by SmartRecruiters - Candidate Privacy Policy

Full job record

Job ID40038a013e1dc46766977b1ddd15becdadc228a9
Org ID7bbbc5d7-486c-4d83-a5f0-3479839268e0
Source IDd2d76f72-69cc-40d9-8c6f-d41778e65e1a
Board IDd2d76f72-69cc-40d9-8c6f-d41778e65e1a
Providersmartrecruiters
Provider Job Key744000116270900
TitleDesign Verification Engineer
Normalized Title
Statusdeleted
Activeno
Location TextRancho Cordova, CA, United States
DepartmentNAND Development
Team
Employment Typefull_time
Workplace Type
Remote Policy
CountryUnited States
RegionCA
CityRancho Cordova
Salary RawUSD 121280-194100 year
Salary Min121,280
Salary Max194,100
Salary CurrencyUSD
Salary Periodyear
Source URLhttps://jobs.smartrecruiters.com/Solidigm/744000116270900-design-verification-engineer
Apply URLhttps://jobs.smartrecruiters.com/Solidigm/744000116270900-design-verification-engineer?oga=true
First Seen At2026-05-31 17:44:21Z
Last Seen At2026-06-09 10:51:24Z
Last Checked At2026-06-11 10:52:23Z
Last Changed At2026-06-11 10:52:23Z
Inactive At2026-06-11 10:52:23Z
Source Posted At2026-03-23 19:40:32Z
Source Updated At
Raw Payload Uris3://job-postings-prod-raw-590183727216/raw/provider=smartrecruiters/board=solidigm/date=2026-06-09/2026-06-09T10-51-20-564Z-527fc4d28f1b6435c3db1d9fad40595748a38f15f4011d60b282c808c3c4aa77.json
Event Fields
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Parsed Structured
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Extensions
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