Staff Digital Verification Engineer

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          "text": "<p>· Verification of DDR6 Data Buffer to meet functional and performance specifications.</p><p>· Be able to integrate and test on System-level and block level using UVM methodology</p><p>· Support in developing verification plan based on specifications.</p><p>· Support in Verification planning, maintenance, feature extraction, verification tests, coverage and checker development.</p><p>· Develop efficient, reusable state-of-the-art verification environments and testbench structures.</p><p>· Optimize solutions for key indicators such as reusability, performance and ease of use</p><p>· Identify and communicate improvements that may ease verification and/or improve design behavior.</p><p>· Support in optimizing UVM based testbench.</p><p>· Take ownership of verification environments for assigned blocks, and tools appointed to you as Expert User.</p><p>· Participate in feasibility studies.</p>",
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