Home › Companies › Lyte AI › Senior PHY-Algo Engineer
Senior PHY-Algo Engineer
Lyte AI · Sunnyvale, CA, United States · On Site · Active · $150,000–$250,000 / year · Rippling ATS
Job facts
| Field | Value |
|---|---|
| Company | Lyte AI |
| Title | Senior PHY-Algo Engineer |
| Normalized title | - |
| Department / team | Silicon |
| Location | Sunnyvale, CA, United States |
| Work model | On Site |
| Employment type | Full Time |
| Salary | $150,000–$250,000 / year |
| Status | active |
| ATS provider | Rippling ATS |
| Posted / first seen | 2026-01-19 / 2026-05-29 |
| Changed / last seen | 2026-06-06 / 2026-06-06 |
Related slices
| Page | What it contains | Open |
|---|---|---|
| Company jobs | Active postings from Lyte AI. | Open |
| Company breakdowns | Role, location, ATS, and work model facets for this company. | Open |
| ATS provider jobs | Active postings observed through Rippling ATS. | Open |
| Provider filtered search | The same provider as a filtered job collection. | Open |
| City jobs | Active postings in Sunnyvale. | Open |
| Department jobs | Active postings in Silicon. | Open |
| Work model jobs | Active On Site postings. | Open |
| Lifecycle events | Open, update, close, and reopen events for this posting. | Open |
| Original posting | Canonical source or apply URL captured from the ATS. | Open |
Linked records
| Company | Lyte AI |
| Source | f4afde55-a55c-4387-8736-a15d6734cb06 |
| ATS provider | Rippling ATS |
Description
company
About Lyte
Lyte builds perception systems for Physical AI operating in complex environments. The company combines custom silicon, integrated sensors, and software into a unified platform for robotics, mobility, and next-generation automation. Lyte is headquartered in Sunnyvale, California, with a global presence. For more information, visit www.lyte.ai
If you’re excited about building impactful technology in a dynamic, hands-on environment, we’d love to hear from you!
role
About the role
We are seeking a Senior PHY Algorithm Engineer to join our team and contribute to the
development and delivery of state-of-the-art algorithmic solutions integrated into the company’s
products. The successful candidate will have hands-on experience designing and developing
algorithms intended for implementation on dedicated hardware accelerators, CPUs, GPUs, and
vector DSPs. In this role, you will be responsible for the development, optimization, and long-
term support of high-performance DSP algorithm pipelines. You will work closely with Digital
Front-End design, verification, and embedded DSP software teams throughout the full algorithm
development lifecycle. You will support silicon bring-up and end-to-end system integration,
including data analysis and validation, working closely with cross-functional teams to ensure
robust, production-ready solutions. What you'll do
Research, design, and develop advanced signal processing algorithms for sensing
applications Define, document, and maintain algorithmic specifications and technical documentation Perform fixed-point analysis and modeling to support efficient HW and SW
implementations Develop and execute end-to-end algorithm pipeline simulations using MATLAB and/or
Python Conduct algorithm performance evaluation and validation at both block and system levels
within simulation environments Optimize platform and HW architectures with a focus on effective HW/SW partitioning Collaborate closely with front-end design, verification, architecture, SW, and system
teams throughout the development lifecycle Required Qualifications
Bachelor’s degree in Electrical Engineering, Computer Science, or a closely related field Minimum of 5 years of experience in algorithm development, spanning concept,
modeling, and implementation, for signal processing and/or advanced communication
systems Proficiency in Python, MATLAB, and C/C++ for the development, integration, and
validation of algorithms within end-to-end DSP pipelines Demonstrated expertise in fixed-point design and implementation of computationally
intensive algorithms, including the delivery of bit-exact and cycle-accurate fixed-point
models and detailed specifications Proven experience collaborating with Digital Front-End designers, verification engineers,
and embedded DSP software developers, including the generation of test vectors to
enable bit-exact algorithm implementations in RTL and embedded software Strong analytical, debugging, and problem-solving capabilities Excellent written and verbal communication skills A collaborative team-oriented mindset with the ability to work effectively across
multidisciplinary engineering teams Preferred Qualifications
MSc or PhD in Electrical Engineering, or a closely related field Experience in algorithm development and data analysis across application domains such
as automotive systems, IoT, robotics, and multimodal sensor platforms Strong foundation in signal processing, including spectrum analysis, filter design,
estimation and detection theory, and optimization techniques Experience developing computer vision and machine learning algorithms, including
clustering, tracking, classification, and 3D point-cloud processing Proven experience porting and optimizing DSP algorithms for dedicated HW accelerators
and heterogeneous CPU/DSP/GPU architectures, with particular emphasis on radar and
LiDAR sensor applications Benefits (subject to location and local regulations)
Competitive salary and equity Comprehensive medical, dental, and vision coverage 401(k) retirement plan Flexible vacation and time-off policy Collaborative, fast-paced, and inclusive work environment Opportunity to work on cutting-edge technologies with a highly cross-functional team
Full job record
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| Org ID | 3c5bf59d-998c-4877-a152-62bdeba1ec4a |
| Source ID | f4afde55-a55c-4387-8736-a15d6734cb06 |
| Board ID | f4afde55-a55c-4387-8736-a15d6734cb06 |
| Provider | rippling |
| Provider Job Key | fa5741e2-117c-4241-a2ef-e2ca71cd3397 |
| Title | Senior PHY-Algo Engineer |
| Normalized Title | — |
| Status | active |
| Active | yes |
| Location Text | Sunnyvale, CA, United States |
| Department | Silicon |
| Team | — |
| Employment Type | full_time |
| Workplace Type | on_site |
| Remote Policy | — |
| Country | United States |
| Region | CA |
| City | Sunnyvale |
| Salary Raw | USD 150000-250000 YEAR |
| Salary Min | 150,000 |
| Salary Max | 250,000 |
| Salary Currency | USD |
| Salary Period | year |
| Source URL | https://ats.rippling.com/lyte/jobs/fa5741e2-117c-4241-a2ef-e2ca71cd3397 |
| Apply URL | https://ats.rippling.com/lyte/jobs/fa5741e2-117c-4241-a2ef-e2ca71cd3397 |
| First Seen At | 2026-05-29 07:16:45Z |
| Last Seen At | 2026-06-06 08:47:06Z |
| Last Checked At | 2026-06-06 08:47:06Z |
| Last Changed At | 2026-06-06 08:47:06Z |
| Inactive At | — |
| Source Posted At | 2026-01-19 04:41:42Z |
| Source Updated At | — |
| Raw Payload Uri | s3://job-postings-prod-raw-590183727216/raw/provider=rippling/board=lyte/date=2026-06-06/2026-06-06T08-47-04-305Z-aa42d0b01651f1dcaf7eacf14e444fb6b6112aea26f954b521d00a5d2a81ac5d.json |
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"role": "<meta><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">About the role</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">We are seeking a Senior PHY Algorithm Engineer to join our team and contribute to the</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">development and delivery of state-of-the-art algorithmic solutions integrated into the company’s</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">products. The successful candidate will have hands-on experience designing and developing</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">algorithms intended for implementation on dedicated hardware accelerators, CPUs, GPUs, and</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">vector DSPs. In this role, you will be responsible for the development, optimization, and long-</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">term support of high-performance DSP algorithm pipelines. You will work closely with Digital</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">Front-End design, verification, and embedded DSP software teams throughout the full algorithm</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">development lifecycle. You will support silicon bring-up and end-to-end system integration,</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">including data analysis and validation, working closely with cross-functional teams to ensure</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">robust, production-ready solutions.</span></li></ul><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">What you'll do</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Research, design, and develop advanced signal processing algorithms for sensing</span><br><span style=\"white-space:pre-wrap;\">applications</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Define, document, and maintain algorithmic specifications and technical documentation</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Perform fixed-point analysis and modeling to support efficient HW and SW</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">implementations</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Develop and execute end-to-end algorithm pipeline simulations using MATLAB and/or</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">Python</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Conduct algorithm performance evaluation and validation at both block and system levels</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">within simulation environments</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Optimize platform and HW architectures with a focus on effective HW/SW partitioning</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Collaborate closely with front-end design, verification, architecture, SW, and system</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">teams throughout the development lifecycle</span></li></ul><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">Required Qualifications</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Bachelor’s degree in Electrical Engineering, Computer Science, or a closely related field</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Minimum of 5 years of experience in algorithm development, spanning concept,</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">modeling, and implementation, for signal processing and/or advanced communication</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">systems</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Proficiency in Python, MATLAB, and C/C++ for the development, integration, and</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">validation of algorithms within end-to-end DSP pipelines</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Demonstrated expertise in fixed-point design and implementation of computationally</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">intensive algorithms, including the delivery of bit-exact and cycle-accurate fixed-point</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">models and detailed specifications</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Proven experience collaborating with Digital Front-End designers, verification engineers,</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">and embedded DSP software developers, including the generation of test vectors to</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">enable bit-exact algorithm implementations in RTL and embedded software</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Strong analytical, debugging, and problem-solving capabilities</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Excellent written and verbal communication skills</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">A collaborative team-oriented mindset with the ability to work effectively across</span><br><span style=\"font-size:12pt;white-space:pre-wrap;\">multidisciplinary engineering teams</span></li></ul><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">Preferred Qualifications</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">MSc or PhD in Electrical Engineering, or a closely related field</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Experience in algorithm development and data analysis across application domains such</span><br><span style=\"white-space:pre-wrap;\">as automotive systems, IoT, robotics, and multimodal sensor platforms</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Strong foundation in signal processing, including spectrum analysis, filter design,</span><br><span style=\"white-space:pre-wrap;\">estimation and detection theory, and optimization techniques</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Experience developing computer vision and machine learning algorithms, including</span><br><span style=\"white-space:pre-wrap;\">clustering, tracking, classification, and 3D point-cloud processing</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;\"><span style=\"white-space:pre-wrap;\">Proven experience porting and optimizing DSP algorithms for dedicated HW accelerators</span><br><span style=\"white-space:pre-wrap;\">and heterogeneous CPU/DSP/GPU architectures, with particular emphasis on radar and</span><br><span style=\"white-space:pre-wrap;\">LiDAR sensor applications</span></li></ul><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:left;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">Benefits </strong></b><span style=\"font-size:12pt;white-space:pre-wrap;\">(subject to location and local regulations)</span></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Competitive salary and equity </span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Comprehensive medical, dental, and vision coverage </span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">401(k) retirement plan </span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Flexible vacation and time-off policy </span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Collaborative, fast-paced, and inclusive work environment </span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Opportunity to work on cutting-edge technologies with a highly cross-functional team </span></li></ul>",
"company": "<meta><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">About Lyte</strong></b></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:12pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Lyte builds perception systems for Physical AI operating in complex environments. The company combines custom silicon, integrated sensors, and software into a unified platform for robotics, mobility, and next-generation automation. Lyte is headquartered in Sunnyvale, California, with a global presence. For more information, visit </span><a href=\"http://www.lyte.ai\" target=\"_blank\" class=\"css-173makr-linkStyle\" style=\"color:rgb(30,74,169);cursor:pointer;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">www.lyte.ai</span></a></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:12pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><br></p><p style=\"font-family:"Basel Grotesk",Arial,sans-serif;font-size:12pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:center;\"><b><strong style=\"font-size:13pt;white-space:pre-wrap;\">If you’re excited about building impactful technology in a dynamic, hands-on environment, we’d love to hear from you!</strong></b></p>"
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}Get this page with API
Rendered from the bluedoor Job Postings API. Reproduce it:
GET https://api.bluedoor.sh/job-postings/v1/jobs/2500cb421e946915d5b6518819f6d764f9e15a30?include=descriptionJSONGET https://api.bluedoor.sh/job-postings/v1/orgs/3c5bf59d-998c-4877-a152-62bdeba1ec4aJSONGET https://api.bluedoor.sh/job-postings/v1/sources/f4afde55-a55c-4387-8736-a15d6734cb06JSONGET https://api.bluedoor.sh/job-postings/v1/jobs/2500cb421e946915d5b6518819f6d764f9e15a30/eventsJSON