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Photonics IC Engineer - Tech Lead

Lyte AI · Sunnyvale, CA, United States · On Site · Active · $150,000–$250,000 / year · Rippling ATS

Job facts

FieldValue
CompanyLyte AI
TitlePhotonics IC Engineer - Tech Lead
Normalized title-
Department / teamSilicon
LocationSunnyvale, CA, United States
Work modelOn Site
Employment typeFull Time
Salary$150,000–$250,000 / year
Statusactive
ATS providerRippling ATS
Posted / first seen2026-02-07 / 2026-05-29
Changed / last seen2026-06-06 / 2026-06-06

Related slices

PageWhat it containsOpen
Company jobsActive postings from Lyte AI.Open
Company breakdownsRole, location, ATS, and work model facets for this company.Open
ATS provider jobsActive postings observed through Rippling ATS.Open
Provider filtered searchThe same provider as a filtered job collection.Open
City jobsActive postings in Sunnyvale.Open
Department jobsActive postings in Silicon.Open
Work model jobsActive On Site postings.Open
Lifecycle eventsOpen, update, close, and reopen events for this posting.Open
Original postingCanonical source or apply URL captured from the ATS.Open

Linked records

CompanyLyte AI
Sourcef4afde55-a55c-4387-8736-a15d6734cb06
ATS providerRippling ATS

Description

company About Lyte Lyte builds perception systems for Physical AI operating in complex environments. The company combines custom silicon, integrated sensors, and software into a unified platform for robotics, mobility, and next-generation automation. Lyte is headquartered in Sunnyvale, California, with a global presence. For more information, visit www.lyte.ai If you’re excited about building impactful technology in a dynamic, hands-on environment, we’d love to hear from you! role About the role We are seeking a highly motivated Photonics IC Technical Lead to join our team. In this role, you will lead the design and development of silicon photonics devices, sub-systems, and PICs, while collaborating closely with a multidisciplinary engineering team. This role involves design, tapeout, and test from wafer level to module level. This position requires deep expertise in photonic IC design and tapeout, electromagnetics, packaging, and semiconductor physics. You should have a strong understanding of both passive and active components, with extensive experience using EDA tools and conducting laboratory testing. What you'll do Lead the design of high-performance, manufacturable passive and active Silicon photonics components Create and optimize photonics layouts and contribute to tapeouts Perform comprehensive simulations and modeling to get the first designs right Participate in design reviews and contribute to design methodology improvements Create detailed design documentation and technical specifications Develop and implement test plans, procedures, and methodologies for wafer level, chip level, eval board level to sub-module level testing Troubleshoot and debug test setups and design issues, identifying and resolving challenges Perform test measurements and data analysis to characterize device performance Collaborate with cross-functional teams to drive product improvements and resolve technical challenges Support the transition of designs from R&D into high-volume manufacturing Required Qualifications Master's or Ph.D. degree in Electrical Engineering, Applied Physics, or a related field Demonstrated experience in photonic device design, optimization and layout Deep understanding of integrated photonics and optical systems Proficiency in photonic simulation tools like Lumerical, Tidy3d, COMSOL Portfolio of designed and demonstrated photonic components or systems Ability to translate system requirements into photonic design specifications Experience in photonics wafer level and chip level testing Experience developing software in Python, C, C++, or MATLAB Experience building and debugging complicated optical systems involving lasers Preferred Qualifications Good understanding in coherent communication, signal integration, integrated optics, and semiconductor physics Experience with lasers, free-space and fiber optics, signal processing, data science, electronic IC design, opto-electronic packaging, and electrical engineering is a plus. Solid communication and interpersonal skills Ability to operate effectively in a startup environment with ambiguity, speed, and high ownership Benefits (subject to location and local regulations) Competitive salary and equity Comprehensive medical, dental, and vision coverage 401(k) retirement plan Flexible vacation and time-off policy Collaborative, fast-paced, and inclusive work environment Opportunity to work on cutting-edge technologies with a highly cross-functional team

Full job record

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TitlePhotonics IC Engineer - Tech Lead
Normalized Title
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Activeyes
Location TextSunnyvale, CA, United States
DepartmentSilicon
Team
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Workplace Typeon_site
Remote Policy
CountryUnited States
RegionCA
CitySunnyvale
Salary RawUSD 150000-250000 YEAR
Salary Min150,000
Salary Max250,000
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Apply URLhttps://ats.rippling.com/lyte/jobs/26a88cee-3b04-4af4-89c1-82ddd8c88fc7
First Seen At2026-05-29 07:16:45Z
Last Seen At2026-06-06 08:47:06Z
Last Checked At2026-06-06 08:47:06Z
Last Changed At2026-06-06 08:47:06Z
Inactive At
Source Posted At2026-02-07 18:08:41Z
Source Updated At
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      "role": "<meta><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">About the role</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">We are seeking a highly motivated Photonics IC Technical Lead to join our team. In this role, you will lead the design and development of silicon photonics devices, sub-systems, and PICs, while collaborating closely with a multidisciplinary engineering team. This role involves design, tapeout, and test from wafer level to module level. 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You should have a strong understanding of both passive and active components, with extensive experience using EDA tools and conducting laboratory testing.</span></li></ul><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">What you'll do</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Lead the design of high-performance, manufacturable passive and active Silicon photonics components</span></li><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Create and&nbsp;optimize&nbsp;photonics layouts and&nbsp;contribute to&nbsp;tapeouts</span></li><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Perform&nbsp;comprehensive simulations and modeling to get the first designs right</span></li><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Participate in design reviews and contribute to design&nbsp;methodology&nbsp;improvements</span></li><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Create detailed design documentation and technical specifications</span></li><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Develop and implement test plans, procedures, and methodologies for&nbsp;wafer level,&nbsp;chip level, eval board level to sub-module level testing</span></li><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Troubleshoot and debug test setups and design issues,&nbsp;identifying&nbsp;and resolving challenges</span></li><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Perform test measurements and data analysis to characterize device performance</span></li><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Collaborate with cross-functional teams to drive product improvements and resolve technical challenges</span></li><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Support the transition of designs from R&amp;D into high-volume manufacturing</span></li></ul><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">Required Qualifications</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Master's or Ph.D. degree in Electrical Engineering, Applied Physics, or a related field</span></li><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Demonstrated experience in photonic device design,&nbsp;optimization&nbsp;and layout</span></li><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Deep understanding of integrated photonics and optical systems</span></li><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Proficiency&nbsp;in photonic simulation tools like&nbsp;Lumerical, Tidy3d, COMSOL</span></li><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Portfolio of designed&nbsp;and&nbsp;demonstrated&nbsp;photonic components or systems</span></li><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Ability to translate system requirements into photonic design specifications</span></li><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Experience in photonics wafer level and chip level testing</span></li><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Experience developing software in Python, C, C++, or MATLAB</span></li><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Experience building and debugging complicated optical systems involving lasers</span></li></ul><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">Preferred Qualifications</strong></b></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Good understanding in coherent communication, signal integration, integrated optics, and semiconductor physics</span></li><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Experience with lasers, free-space and fiber optics, signal processing, data science, electronic IC design, opto-electronic packaging, and electrical engineering is a plus.</span></li><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Solid communication and interpersonal skills</span></li><li style=\"color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"white-space:pre-wrap;\">Ability to operate effectively in a startup environment with ambiguity, speed, and high ownership</span></li></ul><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">Benefits </strong></b><span style=\"font-size:12pt;white-space:pre-wrap;\">(subject to location and local regulations)</span></p><ul data-pattern=\"discCircleSquare\" data-depth=\"1\" style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;\"><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Competitive salary and equity&nbsp;</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Comprehensive medical, dental, and vision coverage&nbsp;</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">401(k) retirement plan&nbsp;</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Flexible vacation and time-off policy&nbsp;</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Collaborative, fast-paced, and inclusive work environment&nbsp;</span></li><li style=\"font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;text-align:left;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Opportunity to work on&nbsp;cutting-edge&nbsp;technologies with a highly cross-functional team&nbsp;</span></li></ul>",
      "company": "<meta><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><b><strong style=\"font-size:18pt;white-space:pre-wrap;\">About Lyte</strong></b></p><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:12pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">Lyte builds&nbsp;perception&nbsp;systems for Physical AI&nbsp;operating&nbsp;in complex environments. The company combines custom silicon, integrated sensors, and software into a unified platform for robotics, mobility, and next-generation automation. Lyte is headquartered in Sunnyvale, California, with a global presence. For more information, visit </span><a href=\"http://www.lyte.ai\" target=\"_blank\" class=\"css-173makr-linkStyle\" style=\"color:rgb(30,74,169);cursor:pointer;\"><span style=\"font-size:12pt;white-space:pre-wrap;\">www.lyte.ai</span></a></p><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:12pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;\"><br></p><p style=\"font-family:&quot;Basel Grotesk&quot;,Arial,sans-serif;font-size:12pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;text-align:center;\"><b><strong style=\"font-size:13pt;white-space:pre-wrap;\">If&nbsp;you’re&nbsp;excited about building impactful technology in a dynamic, hands-on environment,&nbsp;we’d&nbsp;love to hear from you!</strong></b></p>"
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            "fieldType": "SHORT_ANSWER"
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            "title": "Email",
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            "fieldType": "SHORT_ANSWER"
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          {
            "oid": "pronouns",
            "title": "Pronouns",
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            "title": "Phone number",
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            "oid": "linkedin_link",
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            "oid": "cover_letter",
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    "applicationConfirmationTemplate": "69597919867bd28fa68e9bf6",
    "eeocQuestionnaireEnabledForJobPost": true
  },
  "detail_meta": {
    "url": "https://ats.rippling.com/api/v2/board/lyte/jobs/26a88cee-3b04-4af4-89c1-82ddd8c88fc7",
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}
Get this page with API

Rendered from the bluedoor Job Postings API. Reproduce it:

GET https://api.bluedoor.sh/job-postings/v1/jobs/1bc97c633533c8ce89f392c80ff447f24e0364f6?include=descriptionJSON
GET https://api.bluedoor.sh/job-postings/v1/orgs/3c5bf59d-998c-4877-a152-62bdeba1ec4aJSON
GET https://api.bluedoor.sh/job-postings/v1/sources/f4afde55-a55c-4387-8736-a15d6734cb06JSON
GET https://api.bluedoor.sh/job-postings/v1/jobs/1bc97c633533c8ce89f392c80ff447f24e0364f6/eventsJSON