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GPU/CPU Systems Engineer
Eeho Fa Us2 Oraclecloud Com CX 1 · Seattle, WA, United States · Remote · Active · $135,200–$306,400 / year · Oracle Recruiting Cloud / Fusion HCM
Job facts
| Field | Value |
|---|---|
| Company | Eeho Fa Us2 Oraclecloud Com CX 1 |
| Title | GPU/CPU Systems Engineer |
| Normalized title | - |
| Department / team | Product and Research |
| Location | Seattle, WA, United States |
| Work model | Remote / Remote |
| Employment type | - |
| Salary | $135,200–$306,400 / year |
| Status | active |
| ATS provider | Oracle Recruiting Cloud / Fusion HCM |
| Posted / first seen | 2026-06-18 / 2026-06-19 |
| Changed / last seen | 2026-06-19 / 2026-06-20 |
Related slices
| Page | What it contains | Open |
|---|---|---|
| Company jobs | Active postings from Eeho Fa Us2 Oraclecloud Com CX 1. | Open |
| Company breakdowns | Role, location, ATS, and work model facets for this company. | Open |
| ATS provider jobs | Active postings observed through Oracle Recruiting Cloud / Fusion HCM. | Open |
| Provider filtered search | The same provider as a filtered job collection. | Open |
| City jobs | Active postings in Seattle. | Open |
| Department jobs | Active postings in Product and Research. | Open |
| Work model jobs | Active Remote postings. | Open |
| Lifecycle events | Open, update, close, and reopen events for this posting. | Open |
| Original posting | Canonical source or apply URL captured from the ATS. | Open |
Linked records
| Company | Eeho Fa Us2 Oraclecloud Com CX 1 |
| Source | 75a7d46d-3d85-4632-b5a4-e0645851184d |
| ATS provider | Oracle Recruiting Cloud / Fusion HCM |
Description
Description
Oracle hardware platform development engineering is seeking a highly driven GPU/CPU Platform System Engineer at the Principal Engineer level. The GPU System Engineer will work within development engineering with a small team of talented engineers who lead the development and day-to-day engineering efforts for Oracle’s rapidly growing and successful Cloud AI platforms. You will participate in platform definition, platform development oversight as well as in house development, design reviews, system integration, performance testing and characterization. You will interact closely with third party GPU IC suppliers & partners as well as internal hardware and software development teams to help drive Oracle’s AI Cloud platform solution space. You will be a critical part of the team developing Oracle’s growing Cloud AI solutions. The team you will be joining has delivered the first and second generation of Oracle Cloud dedicated compute, AI platforms, and is working to build out the next generation of Cloud and Enterprise systems, with record breaking-performance, security, and world class quality, using the latest and greatest merchant silicon and technologies.
Oracle Cloud Infrastructure (OCI) is looking for a visionary Systems Engineer to lead innovation in AI hardware and datacenter infrastructure . In this high-impact role, you'll guide the development of emerging technologies in compute accelerators, virtualization, networking, energy systems , and AI infrastructure . Your work will directly influence OCI’s long-term architectural direction and help shape the future of cloud infrastructure.
Responsibilities
Our Design Engineering organization is looking for a highly driven, capable, and dedicated Principal Engineer to join the team developing the next generation AI platform for Cloud. Our products feed solutions into the growing and successful Oracle Cloud for compute, AI, Storage and Compute. In the role you will help drive definition, development, integration, debug, characterization, and tuning of existing and new Cloud AI platforms. You will participate in evaluating AI platform architectures and assist with scaling & optimizations. You will help support solution operational health visibility development by other Oracle Engineering teams and guide these teams on the AI platforms. You will apply your solid expertise in hardware and system engineering, firmware familiarity, GPU and AI platform & tools knowledge, towards filling a system engineering role guiding engineering developers. Your role will include evaluation of merchant silicon for our next generation AI platforms and support tools for running these platforms effectively. You will grow to advise & guide Oracle hardware and software engineering teams, Oracle remote hardware support, and Oracle cloud teams on the use, debug, and in-service monitoring of our next generation AI platforms
Responsibilities
You will be responsible for, and not limited to:
Review and assessment of third-party merchant silicon used for AI Accelerator Modules. Evaluation of system architecture and proposed implementation path analysis. You will participate in platform definition and analysis. Provide platform development oversight for partners. Work with in-house engineering functional experts on design and reviews. Support and guide system integration, performance testing and characterization. Support development program managers on technical assessments & planning. You will interact closely with third party GPU IC suppliers & partners as well as internal hardware, software development, quality assurance, cloud orchestration, hardware and software security experts, and Oracle manufacturing teams. You will document and specify design intent and design details where appropriate in collaboration with the appropriate engineering teams. Participate in hardware platform security evaluations. Guide partner internal Oracle teams on support needed to scale, monitor, and successfully deploy our products to the Cloud. You will assist Oracle Cloud and Support teams in the root-cause of potential hardware or software bugs through firsthand lab replication debug, remote debug, and calls with the appropriate teams supporting our deployed products. Work with Oracle manufacturing teams to ensure that Oracle hardware is secure, robustly evaluated, performing at peak capabilities and well qualified for deployment to our Cloud customers. The AI and Infrastructure team is redefining what’s possible. We empower OCI customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. What This Role Looks Like
Work directly with hardware design and development teams on architecture, implementation, development, deployment, and troubleshooting of AI hardware platforms. Collaboration is also expected with the wider Oracle engineering and operations functional groups as well as our external partners. Develop, implement, own, and run the day-to-day execution of AI platform development, both internally and in partnership with third-party design teams. Including reviews of design plans, schematics, board layout, test feature definition / guidance for subsystem test, as well as System validation plans. Oversee system integration, system test and qualification, define software diagnostics features and utilize third party as well as approved open-source AI platform qualification and test tools. Add to a roster of system characterization and performance testing capabilities and support definition of in-service system monitoring and error reporting needs. Work closely and collaborate with hardware developers, System architects, System engineers, platform firmware developers, partners and AI chip / GPU suppliers, storage, networking and compute experts, on the product development and then with Manufacturing and external suppliers assisting across the new product introduction process out to production. You will also serve as the last level of engineering technical support when trained cloud and support teams require guidance and help in resolving complex deployed product issues. Required Qualifications
Technical hands-on experience with market leading GPU (or alternate AI platforms) from the hardware and platform development, test, and characterization perspectives. Balance hardware performance priorities against power, cost, and cross-functional considerations. Be responsible for meeting hardware product performance and regulatory specifications, if applicable. Solid knowledge of AI / GPU or/and AI/CPU platform architecture and their capabilities. A strong understanding and experience running firmware and system diagnostics tools using BMC firmware, UEFI/ BIOS and Linux tools. Skilled in scripting to customize tests. Solid working experience with GPU supplier test code as well as open-source AI test / characterization tools. Experience with the architecture, design, and implementation of modern server platforms consisting of multiple architectures and vendors, including x86 and ARM server architectures. Experience with hardware development at the system, board, and FPGA level. Required experience with board level tools and ability to reviews hierarchical schematics, multilayer advance board layout, cross board interconnect and end-to-end connectivity analysis. Strong communications skills and ability to clearly communicate complex technical issue across engineering disciplines as well as clearly and succinctly articulate issues for executives. Demonstrated experience debugging and root-causing complex issues that may have a mix of hardware and software causes. Experience with early stage bring-up and power-on, platform firmware debugging, prototype GPU & CPU complex and memory complex debugging. An ability to isolate a problem to the source and the required creativity & expertise to devise timely and robust solutions. Experience and understanding of the latest high-speed busses and interconnect used in modern Compute and AI platforms. Familiarity with their startup connectivity and operational robustness.
Preferred Qualifications
10 years of experience with hardware, design and bring-up. Comfortable with the use of hardware debuggers. Experience in PCIe, DDR, Ethernet, USB, SPI, etc. Experience with platform level security technologies present an advantage in the role. Experience with power circuit design and signal integrity.
Qualifications
Disclaimer:
Certain U.S. based or U.S. customer or client-facing roles may be required to comply with applicable requirements, such as immunization/occupational health mandates, and/or drug testing requirements.
Range and benefit information provided in this posting are specific to the stated locations only
US: Hiring Range in USD from: $135,200 to $306,400 per annum. May be eligible for bonus, equity, and compensation deferral.
Oracle maintains broad salary ranges for its roles in order to account for variations in knowledge, skills, experience, market conditions and locations, as well as reflect Oracle's differing products, industries and lines of business.
Candidates are typically placed into the range based on the preceding factors as well as internal peer equity.
Oracle US offers a comprehensive benefits package which includes the following:
1. Medical, dental, and vision insurance, including expert medical opinion
2. Short term disability and long term disability
3. Life insurance and AD&D
4. Supplemental life insurance (Employee/Spouse/Child)
5. Health care and dependent care Flexible Spending Accounts
6. Pre-tax commuter and parking benefits
7. 401(k) Savings and Investment Plan with company match
8. Paid time off: Flexible Vacation is provided to all eligible employees assigned to a salaried (non-overtime eligible) position. Accrued Vacation is provided to all other employees eligible for vacation benefits. For employees working at least 35 hours per week, the vacation accrual rate is 13 days annually for the first three years of employment and 18 days annually for subsequent years of employment. Vacation accrual is prorated for employees working between 20 and 34 hours per week. Employees working fewer than 20 hours per week are not eligible for vacation.
9. 11 paid holidays
10. Paid sick leave: 72 hours of paid sick leave upon date of hire. Refreshes each calendar year. Unused balance will carry over each year up to a maximum cap of 112 hours.
11. Paid parental leave
12. Adoption assistance
13. Employee Stock Purchase Plan
14. Financial planning and group legal
15. Voluntary benefits including auto, homeowner and pet insurance
The role will generally accept applications for at least three calendar days from the posting date or as long as the job remains posted. Career Level - IC5
Company
Only Oracle brings together the data, infrastructure, applications, and expertise to power everything from industry innovations to life-saving care. And with AI embedded across our products and services, we help customers turn that promise into a better future for all. Discover your potential at a company leading the way in AI and cloud solutions that impact billions of lives.
True innovation starts when everyone is empowered to contribute. That’s why we’re committed to growing a workforce that promotes opportunities for all with competitive benefits that support our people with flexible medical, life insurance, and retirement options. We also encourage employees to give back to their communities through our volunteer programs.
We’re committed to including people with disabilities at all stages of the employment process. If you require accessibility assistance or accommodation for a disability at any point, let us know by emailing [email protected] or by calling 1-888-404-2494 in the United States.
Oracle is an Equal Employment Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability and protected veterans’ status, or any other characteristic protected by law. Oracle will consider for employment qualified applicants with arrest and conviction records pursuant to applicable law.
Full job record
| Job ID | 165042828ddbde1e3e47d1aab6014d89f269238b |
| Org ID | 0d5c59ae-6df0-4704-b7c9-108c436dad3a |
| Source ID | 75a7d46d-3d85-4632-b5a4-e0645851184d |
| Board ID | 75a7d46d-3d85-4632-b5a4-e0645851184d |
| Provider | oracle_hcm |
| Provider Job Key | 337608 |
| Title | GPU/CPU Systems Engineer |
| Normalized Title | — |
| Status | active |
| Active | yes |
| Location Text | Seattle, WA, United States |
| Department | Product and Research |
| Team | — |
| Employment Type | — |
| Workplace Type | remote |
| Remote Policy | remote |
| Country | United States |
| Region | WA |
| City | Seattle |
| Salary Raw | Hiring Range in USD from: $135,200 to $306,400 per annum |
| Salary Min | 135,200 |
| Salary Max | 306,400 |
| Salary Currency | USD |
| Salary Period | year |
| Source URL | https://eeho.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1/job/337608 |
| Apply URL | https://eeho.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1/job/337608 |
| First Seen At | 2026-06-19 11:27:09Z |
| Last Seen At | 2026-06-20 12:19:31Z |
| Last Checked At | 2026-06-20 12:19:31Z |
| Last Changed At | 2026-06-19 11:27:09Z |
| Inactive At | — |
| Source Posted At | 2026-06-18 17:55:12Z |
| Source Updated At | — |
| Raw Payload Uri | s3://job-postings-prod-raw-590183727216/raw/provider=oracle_hcm/board=eeho.fa.us2.oraclecloud.com|CX_1/date=2026-06-20/2026-06-20T12-17-47-885Z-94392cab22cc61a3f4ff56e4e216c49b1e688562166d682366ce56dda6617e92.json |
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"ExternalResponsibilitiesStr": "<p style=\"line-height: normal; margin-bottom: 12pt;\"><span style=\"color: rgb(22, 21, 19); font-family: Arial, sans-serif;\">Our Design Engineering organization is looking for a highly driven, capable, and dedicated Principal Engineer to join the team developing the next generation AI platform for Cloud. Our products feed solutions into the growing and successful Oracle Cloud for compute, AI, Storage and Compute. In the role you will help drive definition, development, integration, debug, characterization, and tuning of existing and new Cloud AI platforms. You will participate in evaluating AI platform architectures and assist with scaling & optimizations. You will help support solution operational health visibility development by other Oracle Engineering teams and guide these teams on the AI platforms. You will apply your solid expertise in hardware and system engineering, firmware familiarity, GPU and AI platform & tools knowledge, towards filling a system engineering role guiding engineering developers. Your role will include evaluation of merchant silicon for our next generation AI platforms and support tools for running these platforms effectively. You will grow to advise & guide Oracle hardware and software engineering teams, Oracle remote hardware support, and Oracle cloud teams on the use, debug, and in-service monitoring of our next generation AI platforms</span></p><p style=\"background-color: rgb(251, 249, 248); line-height: normal; margin-bottom: 0in; vertical-align: bottom;\"> </p><p style=\"background-color: rgb(251, 249, 248); line-height: normal; margin-bottom: 0in; vertical-align: bottom;\"><span style=\"color: rgb(22, 21, 19); font-family: Arial, sans-serif;\">Responsibilities</span></p><p style=\"line-height: normal; margin-bottom: 0in;\"><span style=\"color: rgb(22, 21, 19); font-family: Arial, sans-serif;\">You will be responsible for, and not limited to:</span></p><ul style=\"list-style-type: disc;\"><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Review and assessment of third-party merchant silicon used for AI Accelerator Modules.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Evaluation of system architecture and proposed implementation path analysis. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">You will participate in platform definition and analysis.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Provide platform development oversight for partners.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Work with in-house engineering functional experts on design and reviews.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Support and guide system integration, performance testing and characterization.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Support development program managers on technical assessments & planning. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">You will interact closely with third party GPU IC suppliers & partners as well as internal hardware, software development, quality assurance, cloud orchestration, hardware and software security experts, and Oracle manufacturing teams.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">You will document and specify design intent and design details where appropriate in collaboration with the appropriate engineering teams. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Participate in hardware platform security evaluations. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Guide partner internal Oracle teams on support needed to scale, monitor, and successfully deploy our products to the Cloud.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">You will assist Oracle Cloud and Support teams in the root-cause of potential hardware or software bugs through firsthand lab replication debug, remote debug, and calls with the appropriate teams supporting our deployed products. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Work with Oracle manufacturing teams to ensure that Oracle hardware is secure, robustly evaluated, performing at peak capabilities and well qualified for deployment to our Cloud customers. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"background-color: rgb(248, 248, 248); color: rgb(29, 28, 29); font-family: Arial, sans-serif;\"><span style=\"font-size: 11.5pt;\">The AI and Infrastructure team is redefining what’s possible. We empower OCI customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. </span></span></li></ul><p style=\"line-height: normal; margin-bottom: 12pt;\"><span style=\"color: rgb(22, 21, 19); font-family: Arial, sans-serif;\">What This Role Looks Like </span></p><ul style=\"list-style-type: disc;\"><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\"><i><strong><u>Work directly with</u></strong></i> hardware design and development teams on architecture, implementation, development, deployment, and troubleshooting of AI hardware platforms. Collaboration is also expected with the wider Oracle engineering and operations functional groups as well as our external partners. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\"><i><strong><u>Develop, implement, own, and run the day-to-day execution of</u></strong></i> AI platform development, both internally and in partnership with third-party design teams. Including reviews of design plans, schematics, board layout, test feature definition / guidance for subsystem test, as well as System validation plans. Oversee system integration, system test and qualification, define software diagnostics features and utilize third party as well as approved open-source AI platform qualification and test tools. Add to a roster of system characterization and performance testing capabilities and support definition of in-service system monitoring and error reporting needs. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\"><i><strong><u>Work closely and collaborate with</u></strong></i> hardware developers, System architects, System engineers, platform firmware developers, partners and AI chip / GPU suppliers, storage, networking and compute experts, on the product development and then with Manufacturing and external suppliers assisting across the new product introduction process out to production. You will also serve as the last level of engineering technical support when trained cloud and support teams require guidance and help in resolving complex deployed product issues. </span></li></ul><p style=\"line-height: normal; margin-bottom: 12pt;\"><span style=\"color: rgb(22, 21, 19); font-family: Arial, sans-serif;\">Required Qualifications </span></p><ul style=\"list-style-type: disc;\"><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Technical hands-on experience with market leading GPU (or alternate AI platforms) from the hardware and platform development, test, and characterization perspectives. </span></li><li style=\"background-color: rgb(248, 248, 248); color: rgb(29, 28, 29); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\"><span style=\"font-size: 11.5pt;\">Balance hardware performance priorities against power, cost, and cross-functional considerations. Be responsible for meeting hardware product performance and regulatory specifications, if applicable.</span></span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Solid knowledge of AI / GPU or/and AI/CPU platform architecture and their capabilities. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">A strong understanding and experience running firmware and system diagnostics tools using BMC firmware, UEFI/ BIOS and Linux tools. Skilled in scripting to customize tests.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Solid working experience with GPU supplier test code as well as open-source AI test / characterization tools.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Experience with the architecture, design, and implementation of modern server platforms consisting of multiple architectures and vendors, including x86 and ARM server architectures.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Experience with hardware development at the system, board, and FPGA level.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Required experience with board level tools and ability to reviews hierarchical schematics, multilayer advance board layout, cross board interconnect and end-to-end connectivity analysis. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Strong communications skills and ability to clearly communicate complex technical issue across engineering disciplines as well as clearly and succinctly articulate issues for executives. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Demonstrated experience debugging and root-causing complex issues that may have a mix of hardware and software causes.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Experience with early stage bring-up and power-on, platform firmware debugging, prototype GPU & CPU complex and memory complex debugging. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">An ability to isolate a problem to the source and the required creativity & expertise to devise timely and robust solutions.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Experience and understanding of the latest high-speed busses and interconnect used in modern Compute and AI platforms. Familiarity with their startup connectivity and operational robustness.</span></li></ul><p> </p><p style=\"line-height: normal; margin-bottom: 12pt;\"><span style=\"color: rgb(22, 21, 19); font-family: Arial, sans-serif;\">Preferred Qualifications </span></p><ul style=\"list-style-type: disc;\"><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"background-color: rgb(248, 248, 248); color: rgb(29, 28, 29); font-family: Arial, sans-serif;\"><span style=\"font-size: 11.5pt;\">10 years of experience with hardware, design and bring-up. </span></span><span style=\"font-family: Arial, sans-serif;\">Comfortable with the use of hardware debuggers.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"background-color: rgb(248, 248, 248); color: rgb(29, 28, 29); font-family: Arial, sans-serif;\"><span style=\"font-size: 11.5pt;\">Experience in PCIe, DDR, Ethernet, USB, SPI, etc.</span></span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Experience with platform level security technologies present an advantage in the role. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"background-color: rgb(248, 248, 248); color: rgb(29, 28, 29); font-family: Arial, sans-serif;\"><span style=\"font-size: 11.5pt;\">Experience with power circuit design and signal integrity.</span></span></li></ul><p style=\"line-height: normal; margin-bottom: 0in;\"><span style=\"color: black; font-family: Arial, sans-serif;\"><span style=\"font-size: 11pt;\"> </span></span></p>",
"InternalResponsibilitiesStr": "<p style=\"line-height: normal; margin-bottom: 12pt;\"><span style=\"color: rgb(22, 21, 19); font-family: Arial, sans-serif;\">Our Design Engineering organization is looking for a highly driven, capable, and dedicated Principal Engineer to join the team developing the next generation AI platform for Cloud. Our products feed solutions into the growing and successful Oracle Cloud for compute, AI, Storage and Compute. In the role you will help drive definition, development, integration, debug, characterization, and tuning of existing and new Cloud AI platforms. You will participate in evaluating AI platform architectures and assist with scaling & optimizations. You will help support solution operational health visibility development by other Oracle Engineering teams and guide these teams on the AI platforms. You will apply your solid expertise in hardware and system engineering, firmware familiarity, GPU and AI platform & tools knowledge, towards filling a system engineering role guiding engineering developers. Your role will include evaluation of merchant silicon for our next generation AI platforms and support tools for running these platforms effectively. You will grow to advise & guide Oracle hardware and software engineering teams, Oracle remote hardware support, and Oracle cloud teams on the use, debug, and in-service monitoring of our next generation AI platforms</span></p><p style=\"background-color: rgb(251, 249, 248); line-height: normal; margin-bottom: 0in; vertical-align: bottom;\"> </p><p style=\"background-color: rgb(251, 249, 248); line-height: normal; margin-bottom: 0in; vertical-align: bottom;\"><span style=\"color: rgb(22, 21, 19); font-family: Arial, sans-serif;\">Responsibilities</span></p><p style=\"line-height: normal; margin-bottom: 0in;\"><span style=\"color: rgb(22, 21, 19); font-family: Arial, sans-serif;\">You will be responsible for, and not limited to:</span></p><ul style=\"list-style-type: disc;\"><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Review and assessment of third-party merchant silicon used for AI Accelerator Modules.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Evaluation of system architecture and proposed implementation path analysis. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">You will participate in platform definition and analysis.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Provide platform development oversight for partners.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Work with in-house engineering functional experts on design and reviews.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Support and guide system integration, performance testing and characterization.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Support development program managers on technical assessments & planning. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">You will interact closely with third party GPU IC suppliers & partners as well as internal hardware, software development, quality assurance, cloud orchestration, hardware and software security experts, and Oracle manufacturing teams.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">You will document and specify design intent and design details where appropriate in collaboration with the appropriate engineering teams. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Participate in hardware platform security evaluations. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Guide partner internal Oracle teams on support needed to scale, monitor, and successfully deploy our products to the Cloud.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">You will assist Oracle Cloud and Support teams in the root-cause of potential hardware or software bugs through firsthand lab replication debug, remote debug, and calls with the appropriate teams supporting our deployed products. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Work with Oracle manufacturing teams to ensure that Oracle hardware is secure, robustly evaluated, performing at peak capabilities and well qualified for deployment to our Cloud customers. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"background-color: rgb(248, 248, 248); color: rgb(29, 28, 29); font-family: Arial, sans-serif;\"><span style=\"font-size: 11.5pt;\">The AI and Infrastructure team is redefining what’s possible. We empower OCI customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. </span></span></li></ul><p style=\"line-height: normal; margin-bottom: 12pt;\"><span style=\"color: rgb(22, 21, 19); font-family: Arial, sans-serif;\">What This Role Looks Like </span></p><ul style=\"list-style-type: disc;\"><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\"><i><strong><u>Work directly with</u></strong></i> hardware design and development teams on architecture, implementation, development, deployment, and troubleshooting of AI hardware platforms. Collaboration is also expected with the wider Oracle engineering and operations functional groups as well as our external partners. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\"><i><strong><u>Develop, implement, own, and run the day-to-day execution of</u></strong></i> AI platform development, both internally and in partnership with third-party design teams. Including reviews of design plans, schematics, board layout, test feature definition / guidance for subsystem test, as well as System validation plans. Oversee system integration, system test and qualification, define software diagnostics features and utilize third party as well as approved open-source AI platform qualification and test tools. Add to a roster of system characterization and performance testing capabilities and support definition of in-service system monitoring and error reporting needs. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\"><i><strong><u>Work closely and collaborate with</u></strong></i> hardware developers, System architects, System engineers, platform firmware developers, partners and AI chip / GPU suppliers, storage, networking and compute experts, on the product development and then with Manufacturing and external suppliers assisting across the new product introduction process out to production. You will also serve as the last level of engineering technical support when trained cloud and support teams require guidance and help in resolving complex deployed product issues. </span></li></ul><p style=\"line-height: normal; margin-bottom: 12pt;\"><span style=\"color: rgb(22, 21, 19); font-family: Arial, sans-serif;\">Required Qualifications </span></p><ul style=\"list-style-type: disc;\"><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Technical hands-on experience with market leading GPU (or alternate AI platforms) from the hardware and platform development, test, and characterization perspectives. </span></li><li style=\"background-color: rgb(248, 248, 248); color: rgb(29, 28, 29); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\"><span style=\"font-size: 11.5pt;\">Balance hardware performance priorities against power, cost, and cross-functional considerations. Be responsible for meeting hardware product performance and regulatory specifications, if applicable.</span></span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Solid knowledge of AI / GPU or/and AI/CPU platform architecture and their capabilities. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">A strong understanding and experience running firmware and system diagnostics tools using BMC firmware, UEFI/ BIOS and Linux tools. Skilled in scripting to customize tests.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Solid working experience with GPU supplier test code as well as open-source AI test / characterization tools.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Experience with the architecture, design, and implementation of modern server platforms consisting of multiple architectures and vendors, including x86 and ARM server architectures.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Experience with hardware development at the system, board, and FPGA level.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Required experience with board level tools and ability to reviews hierarchical schematics, multilayer advance board layout, cross board interconnect and end-to-end connectivity analysis. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Strong communications skills and ability to clearly communicate complex technical issue across engineering disciplines as well as clearly and succinctly articulate issues for executives. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Demonstrated experience debugging and root-causing complex issues that may have a mix of hardware and software causes.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Experience with early stage bring-up and power-on, platform firmware debugging, prototype GPU & CPU complex and memory complex debugging. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">An ability to isolate a problem to the source and the required creativity & expertise to devise timely and robust solutions.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Experience and understanding of the latest high-speed busses and interconnect used in modern Compute and AI platforms. Familiarity with their startup connectivity and operational robustness.</span></li></ul><p> </p><p style=\"line-height: normal; margin-bottom: 12pt;\"><span style=\"color: rgb(22, 21, 19); font-family: Arial, sans-serif;\">Preferred Qualifications </span></p><ul style=\"list-style-type: disc;\"><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"background-color: rgb(248, 248, 248); color: rgb(29, 28, 29); font-family: Arial, sans-serif;\"><span style=\"font-size: 11.5pt;\">10 years of experience with hardware, design and bring-up. </span></span><span style=\"font-family: Arial, sans-serif;\">Comfortable with the use of hardware debuggers.</span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"background-color: rgb(248, 248, 248); color: rgb(29, 28, 29); font-family: Arial, sans-serif;\"><span style=\"font-size: 11.5pt;\">Experience in PCIe, DDR, Ethernet, USB, SPI, etc.</span></span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"font-family: Arial, sans-serif;\">Experience with platform level security technologies present an advantage in the role. </span></li><li style=\"color: rgb(22, 21, 19); line-height: normal; margin-bottom: 0in;\"><span style=\"background-color: rgb(248, 248, 248); color: rgb(29, 28, 29); font-family: Arial, sans-serif;\"><span style=\"font-size: 11.5pt;\">Experience with power circuit design and signal integrity.</span></span></li></ul><p style=\"line-height: normal; margin-bottom: 0in;\"><span style=\"color: black; font-family: Arial, sans-serif;\"><span style=\"font-size: 11pt;\"> </span></span></p>",
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