IC Design Engineer (BC/ ON)

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    "datePosted": "2025-06-16",
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    "description": "<p><span style=\"font-family: Lato, sans-serif; font-size: 15px\">About NETINT Technologies Inc.</span></p>\n<p><br></p>\n<p><span style=\"font-family: Lato, sans-serif; font-size: 14px\"><span style=\"color: #444444\">NETINT Technologies is a pioneer of computational storage and video processing SoC solutions for cloud and edge computing. Its Codensity portfolio enables enterprise, cloud data centers, </span><span style=\"color: #444444\">and</span><span style=\"color: #444444\"> content providers to deploy </span><span style=\"color: #444444\">high-performance</span><span style=\"color: #444444\"> applications that they can scale without </span><span style=\"color: #444444\">limit</span><span style=\"color: #444444\"> while minimizing their data storage and video processing costs. NETINT, founded by an experienced team of storage SoC veterans, is a Canadian venture-funded startup with R&amp;D facilities in Vancouver, Toronto, </span><span style=\"color: #444444\">and</span><span style=\"color: #444444\"> Shanghai, China. For more information, visit <a href=\"https://cts.businesswire.com/ct/CT?id=smartlink&amp;url=http%3A%2F%2Fwww.netint.ca&amp;esheet=51963963&amp;newsitemid=20190404005021&amp;lan=en-US&amp;anchor=www.netint.ca&amp;index=2&amp;md5=2ff93001b1f36771b046ea4480873611\" target=\"_blank\" rel=\"noopener noreferrer\">www.netint.ca</a>.</span></span></p>\n<p><br></p>\n<p><span style=\"font-size: 15px\"><span style=\"font-weight: bold\">About this Position</span></span></p>\n<p><br></p>\n<p><span style=\"font-size: 14px\">This is a Full-time, Regular employment opportunity. NETINT offers competitive salaries, benefits and endless learning and development opportunities.</span></p>\n<p><br></p>\n<p><span style=\"font-size: 14px\">This is a flexible position and has the option of working in either <span style=\"font-weight: bold\">Burnaby</span> or <span style=\"font-weight: bold\">Markham</span> office. </span></p>\n<p><br></p>\n<p><span style=\"font-family: Lato, sans-serif; font-size: 15px\">Job Scope</span></p>\n<p><br></p>\n<p><span style=\"font-family: Lato, sans-serif; font-size: 14px\">As an IC design engineer, you will be responsible to work closely with system architects and design lead on the design of a sub-system in SoCs. Responsibilities for this position include participating subsystem micro-architecture and IP vendor selection, sub-system design/verification/backend support. You will also support FW bring up, pre-tape out FPGA verification and system validation on the sub-system.</span></p>\n<p><br></p>\n<p><span style=\"font-family: Lato, sans-serif; font-size: 15px\">Responsibilities</span></p>\n<p><br></p>\n<ul>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">Understand the requirements for the sub-systems</span></li>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">Participate on sub-system micro-architecture and IP vendor selection</span></li>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">Write or understand sub-system documentation</span></li>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">Deliver RTL that meet specifications and performance</span></li>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">Build test bench and verify RTL if required</span></li>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">Test logic and interactions between HW/FW in FPGA environment</span></li>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">Build FPGA using Xilinx Vivado tools and release to System team for testing.</span></li>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">Support backend flows</span></li>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">Support FW, HW and system validation/debug</span></li>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">Support customer bring up </span></li>\n</ul>\n<p><br></p>\n<p><span style=\"font-family: Lato, sans-serif; font-size: 15px; font-weight: bold\">Qualifications</span></p>\n<p><br></p>\n<ul>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">MS or BS in Electrical/Computer Engineering or equivalent</span></li>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">Minimum 3-5 years of IC or FPGA Design experience.</span></li>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">Demonstrated solid RTL coding skills in Verilog and system Verilog</span></li>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">Demonstrated solid HW/system debug skills</span></li>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">Experience with verification methodology and test coverage</span></li>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">Desire to work in an energetic start up environment</span></li>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">The ability to analyze complex HW issues</span></li>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">Skills to recreate the issue a controlled environment</span></li>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">Detail analytical skills to root cause issues</span></li>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">Find creative solutions to difficult system level problems </span></li>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">Clear communication skills</span></li>\n<li><span style=\"font-family: Lato, sans-serif; font-size: 14px\">Very good documentation skills</span></li>\n</ul>\n<p><br></p>\n<p><span style=\"font-family: Lato, sans-serif; font-size: 14px\">We thank you for your interest, however, only candidates selected for an interview will be contacted.</span></p>\n<p><br></p>\n<p><br></p>\n<p><br></p>\n<p><span style=\"font-family: Lato, sans-serif; font-size: 15px; font-weight: bold\"><em>Acknowledgment and Agreement</em></span></p>\n<p><br></p>\n<p><span style=\"font-family: Lato, sans-serif; font-size: 14px\"><em>NETINT Technologies Inc. is an equal opportunity employer and strives to ensure that its hiring process meets the needs of all persons with disabilities. As such, NETINT will provide reasonable accommodation for any applicant, as requested during the hiring process.</em></span></p>",
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