Home › Companies › 983c6f71 252d 4afd 99a3 9fa8f8aa57ea 19000101 000001 › Senior Digital Systems Engineer
Senior Digital Systems Engineer
983c6f71 252d 4afd 99a3 9fa8f8aa57ea 19000101 000001 · New Jersey, Parsippany, NJ, US, Parsippany, NJ · Active · ADP Workforce Now Recruiting
Job facts
| Field | Value |
|---|---|
| Company | 983c6f71 252d 4afd 99a3 9fa8f8aa57ea 19000101 000001 |
| Title | Senior Digital Systems Engineer |
| Normalized title | - |
| Department / team | - |
| Location | New Jersey, NJ, United States |
| Work model | - |
| Employment type | - |
| Salary | - |
| Status | active |
| ATS provider | ADP Workforce Now Recruiting |
| Posted / first seen | 2026-02-26 / 2026-05-31 |
| Changed / last seen | 2026-06-06 / 2026-06-06 |
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| Company breakdowns | Role, location, ATS, and work model facets for this company. | Open |
| ATS provider jobs | Active postings observed through ADP Workforce Now Recruiting. | Open |
| Provider filtered search | The same provider as a filtered job collection. | Open |
| City jobs | Active postings in New Jersey. | Open |
| Lifecycle events | Open, update, close, and reopen events for this posting. | Open |
| Original posting | Canonical source or apply URL captured from the ATS. | Open |
Linked records
| Company | 983c6f71 252d 4afd 99a3 9fa8f8aa57ea 19000101 000001 |
| Source | 8bb5db9d-1550-4e9e-a6e7-77e1cd3d969f |
| ATS provider | ADP Workforce Now Recruiting |
Description
Senior Digital Systems Engineer - Job Description Your challenge Join a stimulating and innovative R&D environment where your contributions directly influence the next generation of satellite communication test & measurement systems. Collaborate internationally with teams across the USA and Europe, and grow your expertise in advanced digital system design and high-performance FPGA development.
Your role We are seeking a highly skilled Senior Digital Systems Engineer with deep expertise in FPGA design, digital signal processing (DSP), and embedded systems. In this senior technical role, you will contribute to the architecture, design, and implementation of digital subsystems integral to our industry-leading satcom channel emulation products. You will collaborate closely with system architects, RF/microwave engineers, and software engineers as part of a multidisciplinary team working on cutting-edge solutions. This role requires strong hands-on design capabilities, attention to detail, and the ability to manage multiple development tasks in a fast-paced engineering environment.
Key duties and responsibilities Design, develop, and test FPGA-based digital systems for satellite communication and test & measurement applications. Implement parallelized DSP algorithms in Verilog/VHDL and optimize for performance and resource utilization. Develop C/C++ hardware drivers enabling real-time FPGA control and system-level integration. Architect and implement microprocessor/microcomputer-based embedded systems, including software integration. Utilize Intel (Altera) FPGA design tools (Quartus Prime) to perform synthesis, debugging, and partitioning; familiarity with Xilinx tools is a plus. Integrate and validate JESD204B/C links and EMIF interfaces with DDR3/4/5 memory subsystems. Perform FPGA floor-planning, timing closure, simulation, and clock-domain-crossing analysis. Use version control and structured workflows to manage system-level development activities. Collaborate closely with multidisciplinary teams to develop high-performance channel emulation solutions. Generate technical documentation and support reporting for internal projects and external proposals. Troubleshoot, evaluate, and resolve design challenges, ensuring solutions align with overall system requirements. Required skills and expertise Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field; Master’s degree preferred. 10+ years of hands-on experience with digital system and FPGA design, including synthesis, debugging, and simulation. Strong proficiency in Intel (Altera) FPGA design tools; experience with Xilinx FPGA design flows is desirable. Proven expertise implementing DSP algorithms in Verilog/VHDL. Experience with JESD204B/C and DDR3/4/5 memory interfaces. Strong understanding of digital communication protocols and standard interfaces (PCI/PCIe, DDR, SPI, I²C, UART, Ethernet); VITA49 experience is a plus. Knowledge of low-power design principles and verification methodologies. Proficiency in C/C++ and Python. Strong analytical and problem-solving abilities with excellent attention to detail. Effective communication skills and the ability to work collaboratively across teams. Ability to manage multiple priorities and deliver high-quality results under deadlines. What we offer An inspiring, dynamic, and challenging high-tech engineering environment Full-time position (40 hours per week) Competitive salary commensurate with experience Annual performance bonus and long-term retention incentive plan Location This role is based either in our Eindhoven, Netherlands or in our Parsippany, NJ engineering office.
About Maury Microwave Corporation
Best-In-Class with Maury Microwave. Maury Microwave is your calibration, measurement, and modeling solutions partner. We leverage decades of measurement expertise to provide fully integrated systems — from adapters and cable assemblies to VNA calibration kits, impedance tuners, and full measurement and modeling platforms. With our best-in-class solutions, we help you complete your lab.
Maury Microwave is an Equal Opportunity/Affirmative Action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex including sexual orientation and gender identity, national origin, disability, protected Veteran Status, or any other characteristic protected by applicable federal, state, or local law.
Full job record
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| Board ID | 8bb5db9d-1550-4e9e-a6e7-77e1cd3d969f |
| Provider | adp_workforcenow |
| Provider Job Key | 541738 |
| Title | Senior Digital Systems Engineer |
| Normalized Title | — |
| Status | active |
| Active | yes |
| Location Text | New Jersey, Parsippany, NJ, US, Parsippany, NJ |
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| City | New Jersey |
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| First Seen At | 2026-05-31 18:42:54Z |
| Last Seen At | 2026-06-06 12:04:10Z |
| Last Checked At | 2026-06-06 12:04:10Z |
| Last Changed At | 2026-06-06 12:04:10Z |
| Inactive At | — |
| Source Posted At | 2026-02-26 16:05:00Z |
| Source Updated At | — |
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"requisitionDescription": "<div><div><p id=\"isPasted\" data-gid=\"7556\"><strong data-gid=\"7557\"> </strong></p><h1 data-pasted=\"true\"><span style=\"font-family: arial, sans-serif; font-size: 14px;\">Senior Digital Systems Engineer - Job Description</span></h1><h2><span style=\"font-family: arial, sans-serif; font-size: 14px;\">Your challenge</span></h2><p><span style=\"font-family: arial, sans-serif; font-size: 14px;\">Join a stimulating and innovative R&D environment where your contributions directly influence the next generation of satellite communication test & measurement systems. Collaborate internationally with teams across the USA and Europe, and grow your expertise in advanced digital system design and high-performance FPGA development.</span></p><h2><span style=\"font-family: arial, sans-serif; font-size: 14px;\">Your role</span></h2><p><span style=\"font-family: arial, sans-serif; font-size: 14px;\">We are seeking a highly skilled Senior Digital Systems Engineer with deep expertise in FPGA design, digital signal processing (DSP), and embedded systems. In this senior technical role, you will contribute to the architecture, design, and implementation of digital subsystems integral to our industry-leading satcom channel emulation products. You will collaborate closely with system architects, RF/microwave engineers, and software engineers as part of a multidisciplinary team working on cutting-edge solutions. This role requires strong hands-on design capabilities, attention to detail, and the ability to manage multiple development tasks in a fast-paced engineering environment.</span></p><h2><span style=\"font-family: arial, sans-serif; font-size: 14px;\">Key duties and responsibilities</span></h2><ul><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Design, develop, and test FPGA-based digital systems for satellite communication and test & measurement applications.</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Implement parallelized DSP algorithms in Verilog/VHDL and optimize for performance and resource utilization.</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Develop C/C++ hardware drivers enabling real-time FPGA control and system-level integration.</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Architect and implement microprocessor/microcomputer-based embedded systems, including software integration.</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Utilize Intel (Altera) FPGA design tools (Quartus Prime) to perform synthesis, debugging, and partitioning; familiarity with Xilinx tools is a plus.</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Integrate and validate JESD204B/C links and EMIF interfaces with DDR3/4/5 memory subsystems.</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Perform FPGA floor-planning, timing closure, simulation, and clock-domain-crossing analysis.</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Use version control and structured workflows to manage system-level development activities.</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Collaborate closely with multidisciplinary teams to develop high-performance channel emulation solutions.</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Generate technical documentation and support reporting for internal projects and external proposals.</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Troubleshoot, evaluate, and resolve design challenges, ensuring solutions align with overall system requirements.</li></ul><h2><span style=\"font-family: arial, sans-serif; font-size: 14px;\">Required skills and expertise</span></h2><ul><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field; Master’s degree preferred.</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">10+ years of hands-on experience with digital system and FPGA design, including synthesis, debugging, and simulation.</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Strong proficiency in Intel (Altera) FPGA design tools; experience with Xilinx FPGA design flows is desirable.</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Proven expertise implementing DSP algorithms in Verilog/VHDL.</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Experience with JESD204B/C and DDR3/4/5 memory interfaces.</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Strong understanding of digital communication protocols and standard interfaces (PCI/PCIe, DDR, SPI, I²C, UART, Ethernet); VITA49 experience is a plus.</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Knowledge of low-power design principles and verification methodologies.</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Proficiency in C/C++ and Python.</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Strong analytical and problem-solving abilities with excellent attention to detail.</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Effective communication skills and the ability to work collaboratively across teams.</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Ability to manage multiple priorities and deliver high-quality results under deadlines.</li></ul><h2><span style=\"font-family: arial, sans-serif; font-size: 14px;\">What we offer</span></h2><ul><li style=\"font-family: arial, sans-serif; font-size: 14px;\">An inspiring, dynamic, and challenging high-tech engineering environment</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Full-time position (40 hours per week)</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Competitive salary commensurate with experience</li><li style=\"font-family: arial, sans-serif; font-size: 14px;\">Annual performance bonus and long-term retention incentive plan</li></ul><h2><span style=\"font-family: arial, sans-serif; font-size: 14px;\">Location</span></h2><p><span style=\"font-family: arial, sans-serif; font-size: 14px;\">This role is based either in our Eindhoven, Netherlands or in our Parsippany, NJ engineering office.</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;' data-pasted=\"true\"><span style=\"font-family: arial, sans-serif; font-size: 14px;\"><strong>About Maury Microwave Corporation</strong></span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 14px;\">Best-In-Class with Maury Microwave. Maury Microwave is your calibration, measurement, and modeling solutions partner. We leverage decades of measurement expertise to provide fully integrated systems — from adapters and cable assemblies to VNA calibration kits, impedance tuners, and full measurement and modeling platforms. With our best-in-class solutions, we help you complete your lab.</span></p><p style='color: rgb(0, 0, 0); font-family: \"Times New Roman\"; font-size: medium; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;'><span style=\"font-family: arial, sans-serif; font-size: 14px;\"><span style=\"color: rgb(0, 0, 0); font-family: arial, sans-serif; font-size: 14px; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: start; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; background-color: rgb(255, 255, 255); text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial; display: inline !important; float: none;\" data-pasted=\"true\">Maury Microwave is an Equal Opportunity/Affirmative Action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex including sexual orientation and gender identity, national origin, disability, protected Veteran Status, or any other characteristic protected by applicable federal, state, or local law.</span></span></p></div></div>\n",
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