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Senior Staff SATCOM Systems Engineer (DSP Algorithms & FPGA)

09a14fa2 30e8 49e6 80ed 82a5812bd326 9200365399883 2 · Chandler, AZ, US, Chandler, AZ · On Site · Active · ADP Workforce Now Recruiting

Job facts

FieldValue
Company09a14fa2 30e8 49e6 80ed 82a5812bd326 9200365399883 2
TitleSenior Staff SATCOM Systems Engineer (DSP Algorithms & FPGA)
Normalized title-
Department / team-
LocationChandler, AZ, United States
Work modelOn Site
Employment typeFull Time
Salary-
Statusactive
ATS providerADP Workforce Now Recruiting
Posted / first seen2026-02-02 / 2026-05-31
Changed / last seen2026-06-06 / 2026-06-06

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Linked records

Company09a14fa2 30e8 49e6 80ed 82a5812bd326 9200365399883 2
Source0ace756a-1450-4b92-ac54-2afac1b4e7bd
ATS providerADP Workforce Now Recruiting

Description

Job Title: Senior SATCOM Algorithm Engineering Manager Department: Engineering-> Systems Reports To: Director, Systems Engineering FLSA Status: Exempt Last Modified: 10/20/2025 Level : T5 Location : Chandler, AZ – Onsite 5 Days a week Company Overview Comtech Telecommunications Corp. is a leading global technology company providing terrestrial and wireless network solutions, next-generation 9-1-1 emergency services, satellite and space communications technologies, and cloud-native capabilities to commercial and government customers around the world. Our unique culture of innovation and employee empowerment unleashes a relentless passion for customer success. With multiple facilities located in technology corridors throughout the United States and around the world, Comtech leverages our global presence, technology leadership, and decades of experience to create the world’s most innovative communications solutions. For more information, please visit www.comtech.com . We’re seeking curious, growth-minded thinkers to help shape our vision, structures, and systems; playing a key role as we launch into our ambitious future. If you’re invigorated by our mission, values, and drive to change the world — we’d love to have you apply. Position Summary Seeking an experienced SATCOM Algorithm Engineering Manager. Support architecture and requirements definition, systems design, and systems integration of next generation satellite modems and related signal processing products. Responsibilities Architect, design, develop and integrate ground-based satellite modem systems, including: High level architecture and requirements definition Support FPGA-based modem implementation Includes VHDL design and implementation of satellite communications waveforms and related signal processing algorithms Support/lead integration of communications subsystems. Utilize strong communication skills to effectively work and communicate with team members and engineering management. Qualifications Strong SATCOM systems engineering experience SATCOM signal processing / algorithm development expertise Strong VHDL design and implementation experience Knowledge of SATCOM waveforms such as DVB-S2X Knowledge of FPGA-based implementation of SATCOM modems and related signal processing FPGA capabilities and limitations SERDES interfaces Ethernet interfaces A/D and DACs L-band interfaces Experience with communications simulation tools (e.g. Matlab) Familiar with laboratory environment Experience with laboratory measurement tools (spectrum analyzers, oscilloscopes, logic analyzers, BERT, etc.) Proficient in software languages (C, C++ ) Working knowledge of communication networks and security within a zero-trust environment Proficient in Microsoft Office Tools (Word, Excel, PowerPoint, Visio, etc.) Desired Qualifications Working knowledge of digital IF streams such as VITA 49.2, DIFI and/or eCPRi Working knowledge of 5G Non Terrestrial Network (NTN) waveforms Familiar with WGS certification Possess an active DoD clearance or demonstrate readiness to obtain one Education Master’s Degree in Electrical Engineering, Wireless Communications, or related degree. Experience : 10+ years of Satellite Communications Systems Engineering or related experience. About Us Comtech Telecommunications Corp. is an Equal Opportunity Employer. Qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability protected veteran status or other characteristics protected by law.

Full job record

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TitleSenior Staff SATCOM Systems Engineer (DSP Algorithms & FPGA)
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First Seen At2026-05-31 18:13:15Z
Last Seen At2026-06-06 12:47:43Z
Last Checked At2026-06-06 12:47:43Z
Last Changed At2026-06-06 12:47:43Z
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Source Posted At2026-02-02 16:59:00Z
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    "requisitionDescription": "<div><div><div><div><p style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;text-align:center;' data-pasted=\"true\"><br></p><p style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;text-align:center;'><strong><span style=\"font-family:Calibri;\">&nbsp;</span></strong></p><p style='margin-top:0in;margin-right:0in;margin-bottom:0in;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><strong><span style=\"font-family:Calibri;\">Job Title:</span></strong><span style=\"font-family:Calibri;\">&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; Senior SATCOM Algorithm Engineering Manager</span></p><p style='margin-top:0in;margin-right:0in;margin-bottom:0in;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><strong><span style=\"font-family:Calibri;\">Department:</span></strong><span style=\"font-family:Calibri;\">&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;Engineering-&gt; Systems</span></p><p style='margin-top:0in;margin-right:0in;margin-bottom:0in;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><strong><span style=\"font-family:Calibri;\">Reports To:</span></strong><span style=\"font-family:Calibri;\">&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; Director, Systems Engineering</span></p><p style='margin-top:0in;margin-right:0in;margin-bottom:0in;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><strong><span style=\"font-family:Calibri;\">FLSA Status:</span></strong><span style=\"font-family:Calibri;\">&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; Exempt</span></p><p style='margin-top:0in;margin-right:0in;margin-bottom:0in;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><strong><span style=\"font-family:Calibri;\">Last Modified:</span></strong><span style=\"font-family:Calibri;\">&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 10/20/2025</span></p><p style='margin-top:0in;margin-right:0in;margin-bottom:0in;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><strong><span style=\"font-family:Calibri;\">Level</span></strong><span style=\"font-family:Calibri;\">:&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; T5</span></p><p style='margin-top:0in;margin-right:0in;margin-bottom:0in;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><strong><span style=\"font-family:Calibri;\">Location</span></strong><span style=\"font-family:Calibri;\">:&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; Chandler, AZ &ndash; Onsite 5 Days a week</span></p><p style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><strong><span style=\"font-family:Calibri;\">&nbsp;</span></strong></p><p style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><strong><span style=\"font-family:Calibri;\">Company Overview</span></strong></p><p style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:Calibri;\">Comtech Telecommunications Corp. is a leading global technology company providing terrestrial and wireless network solutions, next-generation 9-1-1 emergency services, satellite and space communications technologies, and cloud-native capabilities to commercial and government customers around the world. Our unique culture of innovation and employee empowerment unleashes a relentless passion for customer success. With multiple facilities located in technology corridors throughout the United States and around the world, Comtech leverages our global presence, technology leadership, and decades of experience to create the world&rsquo;s most innovative communications solutions. For more information, please visit&nbsp;</span><a href=\"https://cts.businesswire.com/ct/CT?id=smartlink&url=http%3A%2F%2Fwww.comtech.com&esheet=53569004&newsitemid=20231002073328&lan=en-US&anchor=www.comtech.com&index=3&md5=95d01a7b8df70a781b0bf99e20725318\" target=\"_blank\" title=\"https://cts.businesswire.com/ct/ct?id=smartlink&url=http%3a%2f%2fwww.comtech.com&esheet=53569004&newsitemid=20231002073328&lan=en-us&anchor=www.comtech.com&index=3&md5=95d01a7b8df70a781b0bf99e20725318\"><span style=\"font-family:Calibri;\">www.comtech.com</span></a><span style=\"font-family:Calibri;\">.&nbsp;<br>&nbsp;&nbsp;<br>&nbsp;We&rsquo;re seeking curious, growth-minded thinkers to help shape our vision, structures, and systems; playing a key role as we launch into our ambitious future. If you&rsquo;re invigorated by our mission, values, and drive to change the world &mdash; we&rsquo;d love to have you apply.</span></p><p style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><strong><span style=\"font-family:Calibri;\">&nbsp;<br>Position Summary</span></strong></p><p style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:Calibri;\">Seeking an experienced SATCOM Algorithm Engineering Manager. &nbsp;Support architecture and requirements definition, systems design, and systems integration of next generation satellite modems and related signal processing products.</span></p><p style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><strong><span style=\"font-family:Calibri;\">&nbsp;</span></strong></p><p style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><strong><span style=\"font-family:Calibri;\">Responsibilities</span></strong></p><div style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><ul style=\"margin-bottom:0in;list-style-type: disc;\"><li style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:Calibri;\">Architect, design, develop and integrate ground-based satellite modem systems, including:</span><ol style=\"margin-bottom: 0in;list-style-type: circle;\"><li style=\"margin-top: 0in;margin-right: 0in;margin-bottom: 8pt;font-size:15px;font-family: Calibri, sans-serif;\"><span style=\"font-family:Calibri;\">High level architecture and requirements definition&nbsp;</span></li><li style=\"margin-top: 0in;margin-right: 0in;margin-bottom: 8pt;font-size:15px;font-family: Calibri, sans-serif;\"><span style=\"font-family:Calibri;\">Support FPGA-based modem implementation</span><ul style=\"margin-bottom: 0in;list-style-type: square;\"><li style=\"margin-top: 0in;margin-right: 0in;margin-bottom: 8pt;font-size:15px;font-family: Calibri, sans-serif;\"><span style=\"font-family:Calibri;\">Includes VHDL design and implementation of satellite communications waveforms and related signal processing algorithms</span></li></ul></li><li style=\"margin-top: 0in;margin-right: 0in;margin-bottom: 8pt;font-size:15px;font-family: Calibri, sans-serif;\"><span style=\"font-family:Calibri;\">Support/lead integration of communications subsystems.</span></li></ol></li></ul></div><ul style=\"margin-bottom:0in;margin-top:0in;\" type=\"disc\"><li style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:     Calibri;\">Utilize strong communication skills to effectively work and communicate with team members and engineering management.</span></li></ul><p style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><strong><span style=\"font-family:Calibri;\">Qualifications</span></strong></p><div style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><ul style=\"margin-bottom:0in;list-style-type: disc;\"><li style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:Calibri;\">Strong SATCOM systems engineering experience</span></li><li style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:Calibri;\">SATCOM signal processing / algorithm development expertise</span></li><li style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:Calibri;\">Strong VHDL design and implementation experience</span></li><li style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:Calibri;\">Knowledge of SATCOM waveforms such as DVB-S2X</span></li><li style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:Calibri;\">Knowledge of FPGA-based implementation of SATCOM modems and related signal processing</span><ol style=\"margin-bottom: 0in;list-style-type: circle;\"><li style=\"margin-top: 0in;margin-right: 0in;margin-bottom: 8pt;font-size:15px;font-family: Calibri, sans-serif;\"><span style=\"font-family:Calibri;\">FPGA capabilities and limitations</span></li><li style=\"margin-top: 0in;margin-right: 0in;margin-bottom: 8pt;font-size:15px;font-family: Calibri, sans-serif;\"><span style=\"font-family:Calibri;\">SERDES interfaces</span></li><li style=\"margin-top: 0in;margin-right: 0in;margin-bottom: 8pt;font-size:15px;font-family: Calibri, sans-serif;\"><span style=\"font-family:Calibri;\">Ethernet interfaces</span></li><li style=\"margin-top: 0in;margin-right: 0in;margin-bottom: 8pt;font-size:15px;font-family: Calibri, sans-serif;\"><span style=\"font-family:Calibri;\">A/D and DACs</span></li><li style=\"margin-top: 0in;margin-right: 0in;margin-bottom: 8pt;font-size:15px;font-family: Calibri, sans-serif;\"><span style=\"font-family:Calibri;\">L-band interfaces</span></li></ol></li></ul></div><ul style=\"margin-bottom:0in;margin-top:0in;\" type=\"disc\"><li style='margin-top:0in;margin-right:0in;margin-bottom:0in;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:Calibri;\">Experience with communications simulation tools (e.g. Matlab)</span></li></ul><div style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><ul style=\"margin-bottom:0in;list-style-type: disc;\"><li style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:Calibri;\">Familiar with laboratory environment</span></li><li style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:Calibri;\">Experience with laboratory measurement tools (spectrum analyzers, oscilloscopes, logic analyzers, BERT, etc.)</span></li><li style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:Calibri;\">Proficient in software languages (C, C++ )</span></li><li style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:Calibri;\">Working knowledge of communication networks and security within a zero-trust environment</span></li></ul></div><ul style=\"margin-bottom:0in;margin-top:0in;\" type=\"disc\"><li style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:     Calibri;\">Proficient in Microsoft Office Tools (Word, Excel, PowerPoint, Visio, etc.)</span></li></ul><p style='margin-top:12.0pt;margin-right:0in;margin-bottom:6.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;line-height:normal;'><strong><span style=\"font-family:Calibri;\">Desired Qualifications</span></strong></p><ul style=\"margin-bottom:0in;margin-top:0in;\" type=\"disc\"><li style='margin-top:     0in;margin-right:0in;margin-bottom:0in;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:     Calibri;\">Working knowledge of digital IF streams such as VITA 49.2, DIFI and/or eCPRi&nbsp;</span></li><li style='margin-top:     0in;margin-right:0in;margin-bottom:0in;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:     Calibri;\">Working knowledge of 5G Non Terrestrial Network (NTN) waveforms</span></li><li style='margin-top:     0in;margin-right:0in;margin-bottom:0in;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:     Calibri;\">Familiar with WGS certification</span></li><li style='margin-top:     0in;margin-right:0in;margin-bottom:0in;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:     Calibri;\">Possess an active DoD clearance or demonstrate readiness to obtain one</span></li></ul><p style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><strong><span style=\"font-family:Calibri;\">Education</span></strong></p><ul style=\"margin-bottom:0in;margin-top:0in;\" type=\"disc\"><li style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:Calibri;\">Master&rsquo;s Degree in Electrical Engineering, Wireless Communications, or related degree.</span></li></ul><p style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><strong><span style=\"font-family:Calibri;\">Experience</span></strong><span style=\"font-family:Calibri;\">:</span></p><ul style=\"margin-bottom:0in;margin-top:0in;\" type=\"disc\"><li style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><span style=\"font-family:Calibri;\">10+ years of Satellite Communications Systems Engineering or related experience.</span></li></ul><p style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><br></p><p style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><strong><span style=\"font-family:Calibri;\">About Us</span></strong></p><p style='margin-top:0in;margin-right:0in;margin-bottom:8.0pt;margin-left:0in;font-size:11.0pt;font-family:\"Calibri\",sans-serif;'><strong><span style=\"font-family:Calibri;\">Comtech Telecommunications Corp. is an Equal Opportunity Employer. Qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability protected veteran status or other characteristics protected by law.&nbsp;</span></strong></p></div></div></div></div>\n",
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